Chip Package Thermal Dissipation via Substrate Conduction

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Solution Overview

Problem

Conventional flip-chip bonding technologies often lead to heat accumulation between the chip, carrier board, and circuit board, hindering effective heat dissipation in semiconductor packages.

Innovation Solution

A chip package structure incorporating a molding compound, carrier board with a redistribution layer and conductive pillars, and a circuit board, where the chip is positioned between the substrate and circuit board, allowing heat generated by the chip to be transmitted through the substrate from one surface to the other for dissipation, while maintaining electrical connectivity through the conductive pillars.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If flip-chip bonding technology is used to connect chip to carrier board and circuit board, then electrical connectivity is achieved, but heat accumulates between the chip, carrier board, and circuit board

Engineering Contradiction:
Improveelectrical connectivityVSAvoidheat accumulation
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent divides the package structure into distinct functional layers: the carrier board with redistribution layer for electrical connectivity, and the substrate with heat dissipation features for thermal management. This segmentation allows independent optimization of electrical and thermal pathways, resolving the contradiction between achieving electrical connectivity and preventing heat accumulation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The substrate acts as an intermediary component between the carrier board and circuit board. It provides thermal interface features that facilitate heat transfer from the chip while maintaining electrical isolation where needed. This intermediary structure enables simultaneous achievement of electrical connectivity through the carrier board and effective heat dissipation through the substrate.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If chip is disposed directly on circuit board with carrier board in between, then electrical transmission is achieved, but heat dissipation is hindered

Engineering Contradiction:
Improveelectrical transmissionVSAvoidheat dissipation efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The substrate serves multiple functions simultaneously: it provides mechanical support, thermal management through its heat dissipation structure, and electrical isolation. This multi-functionality allows the package to achieve both effective heat dissipation and reliable electrical transmission without requiring separate dedicated components for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces a third dimension by adding the substrate layer between the carrier board and circuit board. This additional dimensional layer provides a dedicated thermal pathway that is separate from the electrical signal pathways, enabling independent optimization of heat dissipation and electrical transmission performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances heat dissipation efficiency by preventing heat accumulation and ensuring effective thermal management in semiconductor packages.

Implementation Method 1

heat generated by the chip is transmitted through the substrate from the first surface to the second surface to be dissipated

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS10211139B2Chip package structure
Publication Date: 2019.02.19 UNIMICRON TECH CORP
  • US10211139B2 patent drawing
  • US10211139B2 patent drawing
  • US10211139B2 patent drawing

AI summary

A chip package structure including a molding compound, a carrier board, a chip, a plurality of conductive pillars and a circuit board is provided. The carrier board includes a substrate and a redistribution layer. The substrate has a first surface and a second surface. The redistribution layer is disposed on the first surface. The chip and the conductive pillars are disposed on the redistribution layer. The molding compound covers the chip, the conductive pillars, and the redistribution layer. The circuit board is connected with the carrier board, wherein the circuit board is disposed on the molding compound, such that the chip is located between the substrate and the circuit board, and the chip and the redistribution layer are electrically connected with the circuit board through the conductive pillars. Heat generated by the chip is transmitted through the substrate from the first surface to the second surface to dissipate.