Chip Package Heat Dissipation Structure for COF Thermal Bottlenecks
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Solution Overview
Problem
Current semiconductor packages, such as COF-type packages, face limitations in heat dissipation due to restricted contact areas and lower thermal conductivity of film substrates, which hinder efficient heat dissipation for high-resolution display devices with increased refresh frequencies.
Innovation Solution
A chip package design featuring a flexible substrate with a first heat dissipation part extending along the side wall and a second heat dissipation part covering the semiconductor chip, connected via heat dissipation glue to form a heat dissipation path, expanding the heat dissipation area and improving thermal conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If an upper heating pad is disposed on a top surface of a chip via an adhesive layer, then the heat dissipation structure is formed, but the contact area between the heating pad and chip is limited, restricting heat dissipation efficiency
Solution Approach 1:
The patent extends the heat dissipation plate from a single-plane configuration to a three-dimensional structure that wraps around the side walls of the chip. This dimensional transition increases the contact area between the heat dissipation plate and the chip from merely the top surface to include the side surfaces, thereby improving heat dissipation efficiency without increasing the footprint area.
Solution Approach 2:
The heat dissipation plate is designed to nest around the chip structure, with the plate wrapping around the side walls and conforming to the chip's geometry. This nesting configuration maximizes the contact area between the heat dissipation plate and the chip while maintaining a compact overall structure.
2Temperature
If a lower heating pad is disposed on a film substrate via an adhesive layer, then the heat dissipation structure is formed, but the film substrate has lower thermal conductivity than metal and the heating pad does not directly contact the chip, resulting in poor heat dissipation effect
Solution Approach 1:
The patent introduces a heat dissipation plate as an intermediary component with high thermal conductivity material between the chip and the film substrate. This plate directly contacts the chip's side walls and serves as an efficient thermal pathway, overcoming the low thermal conductivity of the film substrate and eliminating the need for adhesive layers that would further impede heat transfer.
3Productivity
If the refresh frequency of display devices is increased from 60 Hz to 120 Hz to achieve high-resolution displays, then the display quality is improved, but the load of the driver IC increases, generating more heat that needs to be dissipated
Solution Approach 1:
The heat dissipation plate is divided into multiple functional zones: a first portion that directly contacts the chip's side walls for primary heat absorption, a second portion that extends to contact the chip's top surface for additional heat dissipation, and a third portion that contacts the film substrate for heat distribution. This segmentation allows efficient heat transfer from the high-load driver IC operating at 120 Hz refresh frequency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances heat dissipation efficiency by increasing the contact area and thermal conductivity, effectively managing the heat generated by high-resolution display devices with increased refresh frequencies.
Implementation Method 1
a heat dissipation glue on a lower surface of the second heat dissipation part, wherein the heat dissipation glue connects the semiconductor chip to the second heat dissipation part and connects the second heat dissipation part to the first heat dissipation part, to form a heat dissipation path
Data Source
AI summary
A chip package includes: a flexible substrate including a bottom surface, a side wall, and a top surface including a central region and an edge region; a first heat dissipation part including a body part and a wing part on the bottom surface and extending from opposite ends of the body part to the top surface along the side wall, the wing part covering the edge region; a semiconductor chip on the top surface; a second heat dissipation part covering an upper surface of the semiconductor chip, and a portion of the wing part that covers the edge region; and a heat dissipation glue on a lower surface of the second heat dissipation part, wherein the heat dissipation glue connects the semiconductor chip to the second heat dissipation part and connects the second heat dissipation part to the first heat dissipation part, to form a heat dissipation path.