Chip Package Structure With Exposed Thermal Path for Cooling
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Solution Overview
Problem
In power chip packages, thermal management is challenging due to difficulties in dissipating heat from the center of the chip package to the outside, with existing methods relying on indirect heat transfer through encapsulation material.
Innovation Solution
A chip package design featuring an electrically conductive structure with exposed thermally conductive portions at multiple levels, allowing direct heat dissipation from the center to ambient, and optionally incorporating a heat sink for enhanced cooling efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If chips are completely embedded in encapsulation material, then mechanical protection and electrical insulation are improved, but heat dissipation from the center of the chip package deteriorates
Solution Approach 1:
The patent extracts the thermally conductive structure from the encapsulation material, creating an exposed portion that extends through the encapsulation to the outer surface. This allows heat to be conducted away from the chip while the majority of the structure remains protected by encapsulation, thus maintaining both thermal performance and mechanical protection.
Solution Approach 2:
The patent applies different properties to different parts of the thermally conductive structure: the first portion is exposed to provide thermal conduction path, while the second portion is encapsulated to provide mechanical protection and electrical insulation. This local differentiation resolves the contradiction between heat dissipation and protection.
2Temperature
If thermally conductive structures are exposed to ambient, then heat dissipation is improved, but mechanical protection and electrical insulation deteriorate
Solution Approach 1:
Only the necessary portion of the thermally conductive structure is extracted from encapsulation to enable heat dissipation, while the rest remains encapsulated for protection. This selective extraction maintains mechanical integrity and electrical insulation while achieving thermal management.
Solution Approach 2:
The encapsulation is applied selectively: the first portion of the thermally conductive structure is left exposed for thermal conduction, while the second portion is encapsulated for protection. This local quality differentiation resolves the contradiction between heat dissipation and reliability.
3Device complexity
If heat is transferred indirectly through encapsulation material, then structural simplicity is maintained, but heat dissipation efficiency deteriorates
Solution Approach 1:
The patent introduces a thermally conductive structure as an intermediary between the chip and the external environment. This mediator provides a dedicated thermal conduction path through the encapsulation material, improving heat dissipation efficiency while maintaining overall structural simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly increases cooling efficiency by providing a shorter thermal path and additional cooling surfaces, effectively addressing the heat dissipation challenges in power chip packages.
Implementation Method 1
at least a portion of the electrically conductive structure forms a portion of an outer surface of the chip package body
Implementation Method 2
optionally incorporating a heat sink for enhanced cooling efficiency
Data Source
AI summary
A chip package is provided. The chip package includes a first chip, a second chip, an electrically conductive structure to which the first chip and the second chip are mounted, at least one contact terminal for electrically contacting the first chip and/or the second chip, and encapsulation material at least partially encapsulating the first chip, the second chip, and the electrically conductive structure. The encapsulation material forms a chip package body from which the at least one contact terminal protrudes. At least a portion of the electrically conductive structure forms a portion of an outer surface of the chip package body.