Chip Package Grounding via Through-Hole Substrate
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Solution Overview
Problem
The existing chip packages face challenges in miniaturization and cost reduction due to the need for multiple wire bonds for grounding, which increases interference and material costs, and the limited area on the top surface restricts efficient grounding pad placement.
Innovation Solution
A chip package design featuring a high voltage withstanding substrate with a main body, functional layer made of gallium nitride, and a copper grounding layer that covers the bottom surface and sidewall, allowing the grounding pad to be electrically connected through a through hole, eliminating the need for wire bonding and enabling miniaturization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple conductive wires are used to bond each grounding pad to reduce resistance value, then the grounding effect is improved, but the material cost and manufacturing cost of conductive wires increase and wire interference occurs
Solution Approach 1:
The patent extracts the wire bonding process entirely by implementing a direct pad-to-pad grounding connection structure. The grounding pad on the device chip is directly connected to the grounding pad on the substrate through an through-hole, eliminating the need for conductive wires and their associated bonding processes, thus reducing both material cost and manufacturing complexity while maintaining effective grounding.
Solution Approach 2:
The patent replaces the mechanical wire bonding system with an integrated structural connection system. Instead of using separate conductive wires that require bonding processes, the grounding connection is achieved through the physical structure of the through-hole and direct pad contact, substituting a complex mechanical assembly process with a simpler integrated structure.
2Ease of operation
If grounding pads are placed on the top surface of the chip package, then wire bonding can be implemented, but the limited area restricts miniaturization
Solution Approach 1:
The patent inverts the conventional grounding pad placement strategy by moving the grounding pad from the top surface to the bottom surface of the device chip. This inversion allows the grounding connection to be established through the substrate thickness via an through-hole, freeing up the top surface area for other functional purposes and enabling better utilization of the limited chip package area.
Solution Approach 2:
The patent transitions the grounding pad placement from a two-dimensional top surface arrangement to a three-dimensional through-hole structure that extends through the substrate thickness. This dimensional change allows grounding connections to be established vertically through the substrate rather than horizontally on the surface, enabling more efficient use of the chip package area.
Data Source
AI summary
A chip package includes a high voltage withstanding substrate and a device chip. The high voltage withstanding substrate has a main body, a functional layer, and a grounding layer. The main body has a top surface, a bottom surface opposite the top surface, a through hole through the top surface and the bottom surface, and a sidewall surrounding the through hole. The functional layer is located on the top surface. The grounding layer covers the bottom surface and the sidewall. The device chip is located on the functional layer, and has a grounding pad that faces the main body. The grounding pad is electrically connected to the grounding layer in the through hole.