Chip Package Lid Interface With Cu(111) TIM Barrier for Heat Dissipation
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Solution Overview
Problem
Existing package structures face challenges in efficiently dissipating heat generated during the operation of electronic devices, leading to potential performance degradation or damage due to overheating.
Innovation Solution
The package structure incorporates a metal layer with a textured structure, specifically a Cu(111) layer, between the interposer module and the package lid, along with a thermal interface material (TIM) layer, to enhance heat dissipation by inhibiting the formation of intermetallic compound (IMC) layers and improving thermal conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a thermal interface material (TIM) layer is used to enhance heat transfer, then thermal contact between interposer module and package lid is improved, but the formation of intermetallic compound (IMC) layers and Kirkendall voids occurs, reducing thermal conductivity
Solution Approach 1:
The patent applies a barrier layer to the metal layer before forming the TIM layer. This preliminary action prevents the formation of IMC layers and Kirkendall voids at the interface between the metal layer and TIM layer, thereby maintaining thermal conductivity while still allowing effective heat transfer through the TIM layer.
Solution Approach 2:
The barrier layer acts as an intermediary between the metal layer and the TIM layer. It prevents harmful intermetallic compound formation and Kirkendall voids while allowing the TIM layer to fulfill its heat transfer function, thus resolving the contradiction between thermal contact quality and heat transfer efficiency.
2Temperature
If heat dissipation structures are added to the package, then overheating prevention is improved, but device complexity increases
Solution Approach 1:
The patent combines the heat dissipation function with existing package components. The metal layer is integrated into the package structure and serves both as an electrical interconnect and as a thermal management component. The barrier layer and TIM layer are incorporated into the existing stacking architecture, avoiding additional complex subsystems.
Solution Approach 2:
The metal layer performs multiple functions: electrical interconnection, mechanical support, and thermal conduction. The barrier layer simultaneously prevents IMC formation, reduces Kirkendall voids, and maintains structural integrity. This multi-functionality reduces the need for separate dedicated heat dissipation components, thereby limiting complexity increase.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces Kirkendall voids and enhances heat dissipation efficiency, thereby maintaining the performance and preventing overheating of electronic devices.
Implementation Method 1
enhance heat dissipation by inhibiting the formation of intermetallic compound (IMC) layers
Implementation Method 2
The TIM layer may enhance the transfer of heat between two surfaces with different thermal properties
Implementation Method 3
The TIM layer may improve thermal contact by filling the microscopic gaps and irregularities between the interposer module and package lid
Implementation Method 4
enhance heat dissipation by inhibiting the formation of intermetallic compound (IMC) layers and improving thermal conductivity
Data Source
AI summary
A package structure includes a package substrate, a chip on the package substrate, a package lid on the chip, and a structure between the chip and the package lid. The structure may include a thermal interface material (TIM) layer, and a metal layer between the TIM layer and at least one of the chip or the package lid and configured to inhibit formation of an intermetallic compound (IMC) layer. A method of making the package structure includes forming a metal layer including a high-texture structure on at least one of a chip or a package lid, attaching the chip to a package substrate, forming a thermal interface material (TIM) layer over the chip, and attaching the package lid to the package substrate over the chip so that the chip, the TIM layer and the metal layer are disposed between the package lid and the package substrate.


