Semiconductor Chip Package Layout Without Spacer Chips

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Solution Overview

Problem

The use of spacer chips in semiconductor device packages increases assembly costs and process complexity, while also concentrating stress on overhanging portions of semiconductor chips.

Innovation Solution

A semiconductor device configuration that eliminates the need for a spacer chip by positioning semiconductor chips with cutout portions and varying surface areas to reduce package size and stress concentration, using adhesive layers and resin layers to secure and protect the chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a spacer chip is provided on the substrate to support stacked memory chips, then the package structure is stabilized, but the assembly cost and number of processes increase

Engineering Contradiction:
Improvepackage structure stabilityVSAvoidassembly process complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The invention extracts and eliminates the spacer chip from the package structure by redesigning the substrate to provide direct support for the stacked memory chips. The substrate is configured with a first surface for mounting the stacked chips and a second surface opposite thereto, allowing the chips to be directly bonded to the substrate without requiring an additional spacer component.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention merges the support function previously performed by the separate spacer chip into the substrate itself. The substrate is designed to directly bear and position the stacked memory chips, combining the structural support function with the mounting platform function, thereby eliminating the need for a distinct spacer component.

Inventive Principle:
Principle #5Merging (Combining)

2Stability of the object's composition

If a spacer chip is used to mount stacked memory chips, then the package structure is maintained, but the assembly cost increases

Engineering Contradiction:
Improvepackage structure maintenanceVSAvoidassembly cost
Core Design Contradiction:
Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The spacer chip is extracted from the bill of materials and eliminated from the assembly process. The substrate is redesigned to provide the necessary support structure directly, removing the need to purchase, handle, and assemble a separate spacer chip component.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The substrate is designed to perform multiple functions: serving as the mounting platform for the stacked memory chips and simultaneously providing the structural support previously required by the spacer chip. This multi-functionality reduces component count and assembly cost.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Strength

If spacer chips are used in the package, then the stacked body is supported, but stress concentrates on overhanging portions of semiconductor chips

Engineering Contradiction:
Improvesupported body strengthVSAvoidchip stress distribution
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The spacer chip is removed from the structure, and the substrate is configured to provide direct support to the stacked memory chips. This eliminates the overhanging portions that caused stress concentration, as the chips are now directly bonded to the substrate surface without extending beyond the support structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20240304607A1Semiconductor device, and manufacturing method thereof
Publication Date: 2024.09.12 KIOXIA CORP
  • US20240304607A1 patent drawing
  • US20240304607A1 patent drawing
  • US20240304607A1 patent drawing

AI summary

A semiconductor device includes a substrate that includes a first surface, a first semiconductor chip that includes a second surface facing the first surface of the substrate and a third surface opposite to the second surface, each of the second and third surfaces having a rectangular shape that includes a plurality of sides and has surface areas that are different, and a second semiconductor chip disposed on the first surface of the substrate on one side of the first semiconductor chip. When viewed in a first direction substantially perpendicular to the substrate, one of the sides of the third surface that is closest to the second semiconductor chip overlaps an interior portion of the second semiconductor chip.