Embedded Chip Packaging Frame to Block Adhesive Overflow
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The adhesive material in semiconductor packaging devices can overflow and climb upward during manufacturing, leading to electrical short circuits and reduced conductivity.
Innovation Solution
An embedded semiconductor packaging device is designed with a frame surrounding structure on the top surface of the chip to enclose electrical contacts, preventing adhesive overflow and contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If adhesive material is applied to bond the chip to the base, then bonding strength is improved, but adhesive overflow and contamination occur causing electrical short circuits
Solution Approach 1:
The patent introduces a frame surrounding structure that segments the bonding area, creating a defined boundary between the adhesive application zone and the chip top surface. This segmentation prevents adhesive overflow from reaching the electrical contacts while maintaining effective bonding coverage on the base.
Solution Approach 2:
The frame surrounding structure acts as an intermediary barrier between the adhesive material and the chip top surface. It intercepts and contains the adhesive within the intended bonding area, preventing direct contact with the electrical contacts and eliminating the harmful contamination effect.
2Reliability
If adhesive material is applied in sufficient quantity to ensure bonding, then bonding reliability is improved, but adhesive overflow increases causing electrical short circuits
Solution Approach 1:
The frame surrounding structure segments the bonding process into two distinct zones: a controlled adhesive application area within the frame, and a protected area outside the frame where electrical contacts are located. This allows sufficient adhesive to be applied for reliable bonding without risking overflow onto the chip surface.
Solution Approach 2:
The frame surrounding structure is pre-installed on the chip before adhesive application, creating a preliminary protective barrier. This preemptive measure prevents adhesive overflow from reaching the electrical contacts, allowing the use of sufficient adhesive quantity for reliable bonding without the harmful side effect of contamination.
3Device complexity
If no frame surrounding structure is used, then device complexity is reduced, but adhesive contamination risk increases causing electrical short circuits
Solution Approach 1:
The frame surrounding structure can be implemented as a thin film or planar structure that integrates with the existing packaging layers. This minimizes the added complexity while providing effective containment of the adhesive material, creating a simple yet functional barrier against contamination.
4Reliability
If frame surrounding structure is added to prevent adhesive overflow, then electrical conductivity reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The frame surrounding structure can be merged with existing packaging components such as the lead frame or substrate structure. By combining multiple functions into a single integrated element, the patent reduces the net increase in manufacturing complexity while achieving the goal of preventing adhesive contamination and ensuring electrical conductivity reliability.
Data Source
AI summary
The invention provides an embedded semiconductor packaging device, which includes a base, a chip, a frame surrounding structure, and an encapsulation layer. The base has a bonding surface. The chip has a top surface and a bottom surface opposite to each other, wherein the bottom surface is bonded to the bonding surface of the base through an adhesive layer. The frame surrounding structure is arranged along the periphery of a top surface of the chip. The encapsulation layer covers the chip and the frame surrounding structure.