Chip Packaging via Carrier Detachment and Rewiring

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Solution Overview

Problem

Current chip packaging methods face difficulties in adhering the active surface of the chip to a carrier and subsequent removal of the carrier, especially when using metallic conductors for electrical connections, which complicates the packaging process and increases costs.

Innovation Solution

A method involving mounting the chip and an electrically conductive module on a carrier, forming an encapsulation layer to cover both, detaching the carrier to expose the active surfaces, and completing the packaging with a rewiring process on the exposed surfaces, allowing for efficient electrical connections without the need for complex carrier removal processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the active surface of the chip is adhered to the substrate wafer by tape and plastic-packaged on wafer level, then the chip can be packaged efficiently, but the carrier removal process becomes complicated and costly

Engineering Contradiction:

Improvepackaging efficiencyVSAvoidcarrier removal process complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The invention extracts the active surface of the chip from the substrate wafer by forming a separation layer between them. This allows the active surface to be detached and transferred to a new substrate, eliminating the complexity of removing the original carrier while maintaining packaging efficiency.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The invention introduces a separation layer as an intermediary between the active surface and the substrate wafer. This intermediary layer enables easy detachment and transfer of the active surface without damaging either component, simplifying the carrier removal process.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If metallic conductors are used for electrical connections, then electrical connectivity is achieved, but the packaging process becomes more complex and costly

Engineering Contradiction:

Improveelectrical connection reliabilityVSAvoidpackaging process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The invention changes the material parameter of the electrical connection from metallic conductors to conductive adhesive. This material substitution maintains electrical connectivity while simplifying the packaging process and reducing costs.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The invention uses conductive adhesive as a composite material that combines both adhesive and conductive properties. This single material replaces the need for separate metallic conductors and adhesive layers, reducing process complexity while maintaining reliability.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method simplifies the chip packaging process, reduces costs, and enables effective electrical connections by allowing rewiring after carrier detachment, improving the overall efficiency and reliability of the packaging process.

Implementation Method 1

forming an adhesive layer on the carrier; and mounting the at least one electrically conductive module at a first predetermined position of the carrier, and mounting the at least one chip to be packaged at a second predetermined position of the carrier by the adhesive layer

Methodology Applied

Scientific EffectAdhesion: Adhesive

Implementation Method 2

forming a first encapsulation layer, wherein the first encapsulation layer covers the entire carrier for encapsulating the at least one chip to be packaged and the at least one electrically conductive module

Methodology Applied

Scientific EffectEncapsulation: Physical Containment

Implementation Method 3

completing the packaging by a rewiring process on the active surface of the at least one chip to be packaged and the first surface of the at least one electrically conductive module

Methodology Applied

Scientific EffectElectrical Conduction: Conduction (electrical)

Data Source

PatentUS10431477B2Method of packaging chip and chip package structure

Publication Date: 2019.10.01 PEP INNOVATION PTE LTD

AI summary

The embodiment of the present disclosure discloses a method of packaging a chip and a chip package structure. the method of packaging the chip includes: mounting at least one chip to be packaged and at least one electrically conductive module on a carrier, wherein the at least one chip to be packaged has a back surface facing upwards and an active surface facing towards the carrier, and the at least one electrically conductive module is in the vicinity of the at least one chip to be packaged; forming a first encapsulation layer, wherein the first encapsulation layer covers the entire carrier for encapsulating the at least one chip to be packaged and the at least one electrically conductive module; detaching the carrier to expose the active surface of the at least one chip to be packaged and a first surface of the at least one electrically conductive module; and completing the packaging by a rewiring process on the active surface of the at least one chip to be packaged and the first surface of the at least one electrically conductive module. The present disclosure reduces the difficulty of packaging a chip by mounting the active surface of a chip to be packaged and an electrically conductive module on a carrier and thus saves the cost of packaging.