Chip Packaging Structure With Embedded Thermal Paths for Heat Dissipation

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Solution Overview

Problem

The increasing power consumption of semiconductor chips demands improved heat dissipation in chip packaging, which is hindered by the poor thermal conductivity of package materials and the system-level processing of existing heat dissipation methods.

Innovation Solution

A chip packaging structure is developed, featuring a substrate with embedded signal and thermal transmitting wiring structures, a first chip electrically connected to the signal wiring, and thermal conductive structures in thermal contact with the thermal wiring, laterally surrounding the chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If existing heat dissipation methods are used, then heat dissipation is processed at system level, but thermal conductivity of package materials remains poor

Engineering Contradiction:
Improveheat dissipationVSAvoidpackage structure
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent divides the heat dissipation function into multiple independent thermal conductive structures (thermal conductive blocks) that are distributed around the chip. Each block independently conducts heat from the chip to the substrate, segmenting the heat dissipation path rather than relying on a single system-level solution. This segmentation allows thermal management to be integrated at the package level while maintaining modular flexibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The thermal conductive structures are nested within the package structure, with thermal conductive blocks positioned between the chip and substrate. The mold compound layer encapsulates both the chip and thermal conductive structures, creating a nested arrangement where thermal management components are integrated within the packaging hierarchy rather than added as external system-level attachments.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Temperature

If thermal conductive structures are added to improve heat dissipation, then thermal conductivity increases, but device complexity increases

Engineering Contradiction:
Improvethermal conductivityVSAvoidpackage structure
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The substrate serves multiple functions: it provides mechanical support for the chip, electrical connection through signal transmitting wiring structures, and thermal conduction through thermal transmitting wiring structures. The mold compound layer also serves dual purposes by encapsulating components for protection while providing additional thermal conduction pathways. This multi-functionality reduces the need for separate dedicated thermal management components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges thermal conduction and electrical signal transmission functions into a unified package structure. Thermal conductive blocks are positioned to contact both the chip and substrate, while the substrate integrates both signal and thermal wiring structures. This consolidation of thermal and electrical functions into a single integrated package reduces overall device complexity compared to separate system-level thermal management solutions.

Inventive Principle:
Principle #5Merging (Combining)

3Temperature

If thermal conductive blocks are positioned to surround the chip, then heat dissipation efficiency improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improveheat dissipation efficiencyVSAvoidthermal conductive structure positioning
Core Design Contradiction:
TemperatureVSManufacturing precision

Solution Approach 1:

The thermal conductive blocks are strategically positioned at specific locations around the chip perimeter where heat generation is highest. Rather than uniformly distributing thermal structures throughout the package, the design concentrates thermal conduction capability at critical heat dissipation points. This localized approach maximizes heat dissipation efficiency while reducing the overall number of thermal structures that require precise positioning.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The thermal conductive blocks are pre-positioned on the substrate before the chip is mounted. This preliminary placement allows for easier alignment and positioning of the thermal structures relative to the substrate's thermal transmitting wiring structures, reducing the precision requirements during the final chip assembly step. The pre-positioned thermal blocks serve as reference features for subsequent mounting operations.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design achieves high thermal conductivity within the packaging structure, significantly improving heat dissipation and product performance without altering the external dimensions or materials of existing packages.

Implementation Method 1

a thermal transmitting wiring structure embedded in the substrate; and at least one thermal conductive structure on the substrate, in thermal contact with the thermal transmitting wiring structure

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250038063A1Chip packaging structure, semiconductor structure, and fabricating method thereof
Publication Date: 2025.01.30 YANGTZE MEMORY TECH CO LTD
  • US20250038063A1 patent drawing
  • US20250038063A1 patent drawing
  • US20250038063A1 patent drawing

AI summary

Implementations of chip packaging structures, semiconductor structures and fabricating methods thereof are disclosed. A chip packaging structure comprises a substrate comprising: a signal transmitting wiring structure embedded in the substrate, and a thermal transmitting wiring structure embedded in the substrate. The chip packaging structure further comprises a first chip on the substrate and electrically connected with the signal transmitting wiring structure. The chip packaging structure further comprises at least one thermal conductive structure on the substrate, in thermal contact with the thermal transmitting wiring structure, and laterally surrounding the first chip.