Chip Pad Structure With Etch Stop Layers for Warpage Control
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Solution Overview
Problem
The semiconductor industry faces challenges in forming reliable semiconductor devices at increasingly smaller sizes due to the complexity and difficulty of fabrication processes as feature sizes decrease, leading to issues with warpage and etch resistance in chip manufacturing.
Innovation Solution
The use of multiple layers, including a buffer material layer and etch stop material layers made of different materials, to improve etch resistance and prevent warpage, with specific thickness ratios and materials like silicon nitride, tantalum, and tantalum oxide, to protect conductive pads during etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes are decreased to increase functional density, then production efficiency is improved and costs are lowered, but fabrication process difficulty increases and reliability decreases
Solution Approach 1:
The patent applies preliminary action by forming an etch stop layer and buffer layer structure before conducting etching processes. This pre-established protective structure prevents conductive pads from being etched away, ensuring device reliability is maintained even as feature sizes decrease and fabrication processes become more aggressive.
Solution Approach 2:
The patent introduces an intermediary etch stop layer made of silicon nitride between the conductive pad and the etching process. This intermediary layer has high etch resistance and selectively protects the conductive pad during etching, allowing the etch to proceed through other materials without damaging the pad, thus maintaining reliability while enabling continued scaling.
2Device complexity
If etching processes are performed to form smaller features, then device complexity increases, but conductive pads may be etched away reducing yield
Solution Approach 1:
The etch stop layer is formed preliminarily before the etching process to establish a protective barrier. This pre-formed layer ensures that when etching is performed to create complex smaller features, the conductive pad remains protected and maintains its integrity, preventing yield loss.
Solution Approach 2:
The patent applies local quality by providing etch resistance specifically at the conductive pad region through the etch stop layer, while other regions of the substrate continue to be etched to form the desired complex features. This localized protection maintains manufacturing precision where needed without compromising the ability to create complex devices.
3Reliability
If multiple material layers are added to protect conductive pads, then etch resistance improves, but process complexity increases
Solution Approach 1:
The etch stop layer and buffer layer are formed as preliminary protective structures using standard deposition techniques. While this adds layers to the structure, it provides robust etch resistance that prevents conductive pad damage, and the layers can be integrated into existing fabrication workflows with minimal additional process complexity.
Solution Approach 2:
The patent uses composite material strategy by combining silicon nitride (etch stop layer) with silicon oxide or nitride (buffer layer). This composite structure provides enhanced etch resistance through the silicon nitride layer while the buffer layer provides additional protection and planarity, achieving high reliability through material composition rather than overly complex structural arrangements.
4Reliability
If buffer layer thickness is increased to protect conductive pads, then etch resistance improves, but warpage control becomes difficult
Solution Approach 1:
The patent applies parameter changes by optimizing the buffer layer thickness to a specific range (about 500 Å to about 2000 Å). This parameter optimization provides sufficient etch resistance to protect conductive pads while maintaining substrate planarity and avoiding warpage issues. The etch stop layer thickness is also controlled (about 100 Å to about 500 Å) to balance protection with structural stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the yield of chip formation by preventing conductive pad etching and reducing cleanliness requirements, maintaining planarity, and improving etch resistance, thus facilitating the production of smaller and more complex semiconductor devices.
Implementation Method 1
an etch stop layer over the passivation layer. The etch stop layer and the buffer layer are made of different materials
Data Source
AI summary
A chip structure is provided. The chip structure includes a substrate. The chip structure includes an interconnect structure over the substrate. The chip structure includes a conductive pad over the interconnect structure. The chip structure includes a passivation layer covering the interconnect structure and exposing the conductive pad. The chip structure includes a first etch stop layer over the passivation layer. The chip structure includes a first buffer layer over the first etch stop layer. The first etch stop layer and the first buffer layer are made of different materials. The chip structure includes a second etch stop layer over the first buffer layer. The second etch stop layer and the first buffer layer are made of different materials. The chip structure includes a device element over the second etch stop layer.