Chip Pad Lock Structure for Delamination Prevention

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Solution Overview

Problem

Current chip embedding technologies face challenges with delamination between semiconductor dies and encapsulating materials, particularly in laminated die packages, where the adhesion between copper surfaces and PCB laminate materials is weak, and existing solutions like polyimide layers or Cu roughening are either complicated or ineffective for both front and backside dies.

Innovation Solution

The method involves patterning chip pads to create predefined recesses that reduce the surface area in contact with the encapsulating material, forming lock structures that increase adhesion by filling these recesses with encapsulating material, which can be extended fully or partially through the metallization, and using suitable materials like semiconductor or dielectric materials at the recess bottom for enhanced bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If Cu roughening is applied to increase adhesion, then adhesion strength is improved, but the process becomes complicated and may damage the laminate material

Engineering Contradiction:
Improveadhesion strengthVSAvoidprocess complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming recesses in the copper metallization layers before the lamination process. This allows the encapsulating material to flow into and fill these recesses during lamination, creating mechanical interlocking structures that enhance adhesion without requiring post-lamination roughening processes that could damage the laminate.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the copper metallization surface by creating multiple recesses rather than using a uniform roughened surface. This segmentation provides multiple discrete anchoring points for the encapsulating material, improving adhesion while maintaining a simpler process that avoids the complications of chemical roughening methods.

Inventive Principle:
Principle #1Segmentation

2Strength

If polyimide layer is added to improve adhesion, then adhesion is enhanced, but additional processing steps are required including drilling and de-smear processes

Engineering Contradiction:
Improveadhesion strengthVSAvoidprocessing steps
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent extracts the adhesion enhancement function from separate additional layers (like polyimide) and integrates it directly into the copper metallization structure itself through recess formation. This eliminates the need for additional polyimide layers and the complex processing steps associated with them, such as drilling through passivation and de-smear processes.

Inventive Principle:
Principle #2Taking out (Extraction)

3Strength

If Cu roughening is performed after first lamination, then adhesion may be improved, but the laminate material may be damaged due to partial curing

Engineering Contradiction:
Improveadhesion strengthVSAvoidlaminate integrity
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent performs the adhesion-enhancing recess formation action before lamination rather than after. By creating the recesses in the copper metallization before the encapsulating material is applied and cured, the process avoids subjecting the partially cured laminate to roughening operations that could cause damage, thereby maintaining laminate integrity while still achieving improved adhesion.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11430669B2Forming a lock structure in a semiconductor chip pad
Publication Date: 2022.08.30 INFINEON TECHNOLOGIES AG
  • US11430669B2 patent drawing
  • US11430669B2 patent drawing
  • US11430669B2 patent drawing

AI summary

A method of manufacturing a chip package is provided. The method includes patterning at least one chip pad of a chip to form a patterned structure in the at least one chip pad, the patterned structure including at least one predefined recess, and encapsulating the chip with encapsulating material, thereby filling the at least one predefined recess.