Chip Pad Structure With Shielding Ring for Bonding Stress Relief

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

The challenge in the semiconductor industry is to form reliable semiconductor devices at increasingly smaller sizes, as the scaling-down process complicates fabrication and increases the difficulty of forming reliable devices due to the miniaturization of feature sizes.

Innovation Solution

A chip structure is developed with a shielding pad surrounding a bonding pad, which buffers bonding stress from bumps during subsequent bonding processes, preventing damage to the redistribution layer and improving the yield of these processes by using an insulating layer and a buffer layer to separate and insulate the bonding pads from the shielding pads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs decrease, but fabrication process complexity increases and reliability decreases

Engineering Contradiction:

Improveproduction efficiencyVSAvoiddevice reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies beforehand cushioning by introducing a dedicated shielding pad structure with stress-buffering material before the bump bonding process. This pre-positioned cushioning structure absorbs and distributes the bonding stress that would otherwise damage the redistribution layer, enabling reliable fabrication at smaller feature sizes while maintaining high production efficiency

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs decrease, but fabrication process complexity increases

Engineering Contradiction:

Improveproduction efficiencyVSAvoidfabrication process complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the pad structure into distinct functional components: a bonding pad for electrical connection, a shielding pad for stress protection, and an insulating layer for electrical isolation. This segmented approach simplifies the fabrication process by allowing each component to be formed and protected independently, reducing overall process complexity despite miniaturization

Inventive Principle:

Principle #1Segmentation

3Reliability

If bonding stress from bumps is applied during bonding processes, then electrical connection is achieved, but damage to the redistribution layer occurs

Engineering Contradiction:

Improvebonding reliabilityVSAvoidbonding stress damage

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies the intermediary principle by introducing a shielding pad structure positioned between the bump and the redistribution layer. This intermediary structure absorbs and distributes the bonding stress, preventing direct transmission of harmful forces to the fragile redistribution layer while maintaining effective electrical connection through the bonding pad

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11848270B2Chip structure and method for forming the same

Publication Date: 2023.12.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A chip structure is provided. The chip structure includes a substrate. The chip structure includes a redistribution layer over the substrate. The chip structure includes a bonding pad over the redistribution layer. The chip structure includes a shielding pad over the redistribution layer and surrounding the bonding pad. The chip structure includes an insulating layer over the redistribution layer and the shielding pad. The chip structure includes a bump over the bonding pad and the insulating layer. A sidewall of the bump is over the shielding pad.