Chip-to-Chip Passband Architecture for Signal Integrity and Link Distance
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Solution Overview
Problem
Modern chip-to-chip communication in electronic systems faces challenges such as signal integrity issues, including crosstalk, reflections, and interference, which degrade data quality and increase error rates, particularly in high-frequency communications, whether wired or wireless.
Innovation Solution
A disaggregated passband communication architecture is introduced, where multiple baseband circuits are distributed on a substrate with co-located front-end circuits in a single die, utilizing low-loss transmission lines and an LO sharing scheme to enable high-throughput, low-latency chip-to-chip communication with improved signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If wired interconnects are used for chip-to-chip communication, then data transfer between chips is enabled, but signal integrity deteriorates due to crosstalk, reflections, and frequency-dependent losses at high frequencies
Solution Approach 1:
The patent replaces wired mechanical/electrical interconnects with wireless electromagnetic communication. The wireless interface eliminates physical contact points that cause crosstalk, reflections, and frequency-dependent losses, thereby maintaining signal integrity while enabling high-speed data transfer between chips.
2Reliability
If wireless interconnects are used for chip-to-chip communication, then signal integrity is improved compared to wired connections, but the system becomes susceptible to interference and multipath propagation
Solution Approach 1:
The patent confines the wireless communication to a localized near-field environment between adjacent chips, where electromagnetic coupling is strong and controlled. This localized approach minimizes exposure to external interference and multipath propagation effects that affect far-field wireless communications.
Solution Approach 2:
The patent uses capacitive coupling structures as intermediaries between chips. These coupling structures mediate the wireless energy transfer, providing a controlled electromagnetic path that reduces susceptibility to external interference while maintaining efficient power and data transfer.
3Length of stationary object
If multiple baseband circuits are distributed on substrate with co-located front-end circuits, then channel path loss is minimized and link distance is extended, but device complexity increases
Solution Approach 1:
The patent segments the communication system into multiple distributed baseband circuits on the substrate, each with its own co-located front-end circuit. This segmentation enables parallel communication paths, extends effective link distance, and distributes the complexity across multiple simple units rather than one complex centralized unit.
Solution Approach 2:
The patent merges the front-end circuit with the baseband circuit location, creating co-located transceiver units. This merging eliminates the need for long interconnects between baseband and RF sections, minimizing channel path loss while keeping each integrated unit relatively simple.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This architecture minimizes channel path loss, extends link distance, and supports high-efficiency, low-latency communication with improved signal integrity, suitable for high-data-rate and multi-chip interconnects, particularly in data center applications.
Implementation Method 1
capacitive coupling (e.g. couplers) and/or antennas may be used to convey data. When an electrical signal is applied to one of the couplers, it is detected at the other couplers through the electromagnetic coupling between the two devices.
Implementation Method 2
When an electrical signal is applied to one of the couplers, it is detected at the other couplers through the electromagnetic coupling between the two devices.
Implementation Method 3
utilizing low-loss transmission lines to enable high-throughput, low-latency chip-to-chip communication
Data Source
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AI summary
An integrated circuit device including: a plurality of integrated circuit dies, wherein each integrated circuit die of the plurality of integrated circuit dies is configured to receive or transmit a respective baseband signal; and a further integrated circuit die including: a plurality of front-end circuits, wherein each front-end circuit of the plurality of front-end circuits is coupled to a respective integrated circuit die of the plurality of integrated circuit dies.