Chip Connection Pillars With Exposed Flanks for Solder Inspection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for manufacturing electronic chips with wettable flanks are limited in improving the quality and reliability of connections, particularly in sensitive fields like automotive and medical applications.
Innovation Solution
A method involving the formation of trenches on a semiconductor substrate, deposition of metal connection pillars and protective resin, creation of openings to expose pillar flanks, thinning of the substrate, and cutting the resin to separate integrated circuits into individual chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If connection metallizations are extended to the flanks of chips to enable visual inspection during soldering, then connection quality and reliability are improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by forming openings in the protective resin layer before the soldering process. This allows the flank surfaces of metal connection pillars to be exposed and made accessible in advance, enabling visual inspection of connection quality during soldering without requiring complex post-manufacturing inspection methods. The openings are created at strategic locations where they provide clear views of the connection areas while maintaining structural integrity.
Solution Approach 2:
The patent implements local quality by selectively creating openings only in specific regions of the protective resin layer, rather than removing the resin entirely. This localized approach exposes only the necessary flank surfaces of metal connection pillars for inspection purposes, while preserving the protective resin coverage in other areas to maintain chip protection and structural stability.
2Reliability
If protective resin is deposited over metal connection pillars, then chip protection is improved, but access to pillar flanks for inspection is lost
Solution Approach 1:
The patent applies segmentation by dividing the protective resin layer into covered regions and opened regions. The resin layer is selectively removed or opened at specific locations to create windows that expose the flank surfaces of metal connection pillars. This segmented approach maintains comprehensive protection in most areas while providing localized access points for inspection of connection quality during soldering processes.
3Manufacturing precision
If substrate is thinned to expose protective resin at trench bottoms, then manufacturing precision is improved, but structural strength decreases
Solution Approach 1:
The patent applies partial action by thinning the substrate only to the extent necessary to expose the protective resin layer at the bottoms of trenches, rather than removing excessive material. This controlled thinning achieves the precise exposure needed for subsequent opening formation and inspection access, while minimizing substrate thickness reduction to maintain adequate structural strength and mechanical integrity of the chip.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the quality of connections by allowing visual inspection during soldering and improves the manufacturing process efficiency, addressing the limitations of existing technologies.
Implementation Method 1
forming the cavities in the protective resin by laser drilling
Implementation Method 2
the filling of the cavities with metal in step b2) is realized by a non-electrolytic deposition method
Implementation Method 3
thinning the substrate via its lower face until the protective resin at the bottom of the trenches is reached
Implementation Method 4
cutting the protective resin across from the trenches, so as to separate the integrated circuits into individual chips
Data Source
AI summary
A method for manufacturing electronic chips includes depositing, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, a protective resin. The method includes forming, in the protective resin, at least one cavity per integrated circuit, in contact with an upper face of the integrated circuit. Metal connection pillars are formed by filling the cavities with metal. The integrated circuits are separated into individual chips by cutting the protective resin along cut lines extending between the metal connection pillars.


