Chip Package Pin Multiplexing for Multi-Function Small Devices
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Solution Overview
Problem
Current chip package designs face challenges in reducing size while maintaining functionality, as a large number of pins are required to support multiple functions, leading to increased manufacturing costs and limitations in applying chips to small-size electronic devices.
Innovation Solution
The chip package assembly employs a processing circuit that determines voltage levels to generate control signals, allowing multiple functions to be executed using a single pin through time-division multiplexing, thereby reducing the number of pins required while maintaining multifunctionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the quantity of pins is reduced to match small-size electronic devices, then the chip size can be reduced, but the number of supported functions must be limited
Solution Approach 1:
The patent implements multi-functionality by enabling a single pin to perform multiple functions through time-division multiplexing. The processing circuit detects voltage signals at different time points (first time point, second time point, third time point) and executes different functions based on the detected voltage levels, allowing one pin to replace multiple pins and support multiple functions simultaneously
Solution Approach 2:
The patent applies periodic action by using time-division multiplexing where the pin receives voltage signals at different time points (first time point, second time point, third time point). The processing circuit executes different functions at different time intervals based on the voltage signal detection, enabling a single pin to handle multiple functions through periodic time-based operation
2Adaptability or versatility
If all functions are retained with a large quantity of pins, then functional completeness is maintained, but manufacturing costs increase and the chip cannot be applied to small-size devices
Solution Approach 1:
The patent reduces manufacturing cost by implementing multi-functionality where a single pin can perform multiple functions. The processing circuit detects voltage signals at different time points and executes different functions accordingly, allowing one pin to replace multiple pins. This reduction in pin quantity directly lowers manufacturing costs while maintaining complete functional support
3Volume of moving object
If the chip size is reduced by reducing pin quantity, then small-size electronic device application is enabled, but a choice must be made among functions and some functions cannot be executed
Solution Approach 1:
The patent maintains function selection flexibility through periodic time-based operation. The processing circuit detects voltage signals at multiple time points (first time point, second time point, third time point) and executes different functions based on the detection results. This time-division approach allows the chip to perform different functions at different times, maintaining flexibility in function selection while using a reduced pin quantity for smaller chip size
Data Source
AI summary
A chip package assembly and a chip function execution method thereof are provided. The chip package assembly includes a plurality of pins, and one of the plurality of pins is configured to receive a voltage signal. A processing circuit is configured to receive the voltage signal, where the processing circuit determines whether a voltage level of the voltage signal is a first level or a second level, to generate a first control signal according to the first level, and generate a second control signal according to the second level. A first functional circuit of a plurality of functional circuits executes a first function according to the first control signal, and a second functional circuit of the plurality of functional circuits executes a second function according to the second control signal.