Multi-Die Chip Port Direction Switching for Bandwidth
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Solution Overview
Problem
In multi-die packaging, the interconnection resources of the physical layer interface between dies are not fully utilized due to unbalanced data transmission, leading to resource waste and insufficient bandwidth.
Innovation Solution
A chip is designed with at least two dies, where a first processing unit monitors the queue depth of data output from one die to another and switches ports through handshaking to adjust the transmission direction, ensuring that ports are used for both input and output based on demand, thereby increasing bandwidth and utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If fixed-direction ports are used for interconnection between dies, then the structure is simple and easy to manufacture, but the interconnection resources cannot be fully utilized when data transmission is unbalanced
Solution Approach 1:
The patent applies dynamics by making port directions switchable rather than fixed. The processing units can dynamically change the input/output direction of ports based on real-time data transmission needs, allowing the same physical port to serve different functions at different times, thereby fully utilizing interconnection resources while maintaining manufacturing simplicity
Solution Approach 2:
The patent changes the operational parameter of port direction from static to dynamic. By monitoring queue depths and switching port directions based on transmission balance, the system adapts to varying data flow conditions, resolving the contradiction between manufacturing simplicity and resource utilization efficiency
2Reliability
If dedicated bidirectional ports are used for each die pair, then data transmission in both directions is guaranteed, but interconnection resources are wasted when transmission is unbalanced
Solution Approach 1:
The patent makes ports universal by enabling them to function as both input and output ports depending on transmission needs. Instead of dedicating specific ports for specific directions, any port can serve either function, ensuring reliable bidirectional communication capability while eliminating resource waste through flexible allocation
Solution Approach 2:
The patent recovers unused port capacity by switching directions. When one direction has low transmission demand, those ports are recovered and reallocated to the high-demand direction, ensuring full utilization of available bandwidth while maintaining the ability to transmit data in both directions when needed
3Productivity
If port switching is implemented to balance data transmission, then the utilization rate of interconnection resources increases, but the device complexity increases
Solution Approach 1:
The patent implements feedback by having processing units monitor queue depths of data transmission and use this information to make intelligent port switching decisions. This feedback mechanism enables automatic adaptation to transmission imbalances, increasing resource utilization while managing complexity through rule-based control rather than complex hardware
Solution Approach 2:
The processing units perform self-service by autonomously monitoring their own queue depths and deciding when to switch port directions without external intervention. This self-managing approach increases utilization efficiency while minimizing the need for complex external control mechanisms
Data Source
AI summary
A chip is provided, where the chip is formed by packaging at least two dies, and the at least two dies form at least one die group. The die group includes a first die and a second die. A first processing unit and n groups of ports are disposed on the first die, and a second processing unit and m groups of ports are disposed on the second die. The first processing unit is configured to: switch at least one group of first type ports in the n groups of ports from input to output and switch a second type port that is in the m groups of ports and that is coupled to each group of the first type ports from output to input.