Chip Port State Detection Circuit for Fast Low-Power ID Recognition
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Solution Overview
Problem
Existing chip port state detection technologies are inadequate for fast, low-power, and real-time identification of multiple identical chips in a communication terminal, failing to accurately distinguish between different chip states.
Innovation Solution
A chip port state detection circuit comprising a port detection conversion circuit, reference voltage generation circuit, first and second comparators, dynamic bias current generation circuit, and chip ID determination circuit, which converts port states into voltages, compares them with reference voltages, and outputs logic signals to determine chip IDs, ensuring fast, low-power, and real-time detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional port state detection methods are used, then chip identification can be achieved, but the detection speed is slow and power consumption is high
Solution Approach 1:
The patent implements dynamic bias current generation that adapts to different detection phases. The circuit switches between different current levels based on whether detection is actively occurring or in idle state, optimizing the balance between detection speed and power consumption by making the bias current dynamic rather than static
Solution Approach 2:
The detection circuit operates in periodic cycles with active detection phases and idle phases. During active phases, higher current is used for fast detection; during idle phases, current is reduced or stopped, achieving both speed requirements during detection and power savings during non-detection periods
2Reliability
If conventional port state detection methods are used, then chip identification can be achieved, but real-time detection cannot be ensured
Solution Approach 1:
The circuit performs preliminary voltage level comparisons using multiple comparators that are pre-configured with different reference voltages. This allows the system to quickly determine port state by comparing against multiple thresholds simultaneously, reducing detection time and enabling real-time detection capability
Solution Approach 2:
The detection function is segmented into multiple parallel comparator circuits, each handling a specific voltage threshold comparison. This segmentation allows simultaneous evaluation of multiple voltage levels, significantly reducing total detection time compared to sequential methods
3Adaptability or versatility
If multiple identical chips are used in a communication terminal, then system functionality is improved, but chip differentiation becomes difficult
Solution Approach 1:
The patent detects local electrical characteristics (voltage levels) at specific port locations on each chip. By measuring the unique voltage state of each chip's port, the system can differentiate between identical chips based on their local electrical properties, enabling precise identification while maintaining full interchangeability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate and efficient identification of multiple identical chips in a communication terminal, meeting requirements for speed, power consumption, and real-time detection by converting port states into corresponding voltages and providing bias currents for comparators.
Implementation Method 1
The first comparator and the second comparator are respectively configured to compare a voltage output by the port detection conversion circuit with input reference voltages, so as to output logic signals
Data Source
Figure 1~2c
Figure 3
Figure 4a
AI summary
Disclosed in the present invention are a chip port state detection circuit, a chip, and a communication terminal. The chip port state detection circuit, by means of a port detection conversion circuit, converts the state of a port to be detected into a corresponding voltage and respectively outputs same to a first comparator and a second comparator, which, after comparing same with a corresponding input reference voltage, output a logic signal to a chip ID determination circuit to obtain a chip ID corresponding to the state of the chip port to be detected, in order to distinguish multiple identical chips. In another aspect, by means of a dynamic bias current production circuit, from the start of the establishment of a power source voltage to before the establishment of the power source voltage is completed and after the establishment of the power source voltage is completed, respectively providing a bias current and a static operating point to the first comparator and the second comparator; thus, detection of the state of the chip port to be detected is completed before the communication terminal recognizes the chip, satisfying the demands for quick detection of the chip port to be detected, and satisfying the demands for static low power consumption and real-time detection by the chip port state detection circuit.