Chip Power Routing for Heat Dissipation

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Solution Overview

Problem

Traditional chip structures with a compacted two-layer printed circuit board, featuring a copper grounding layer, suffer from poor heat dissipation and lower yield due to the separation of the copper grounding layer from the semi-circular package.

Innovation Solution

The chip structure is redesigned with power input lines connecting through holes on the printed circuit board, allowing power input lines to be on the copper grounding layer, and a heat dissipation unit is added on the chip's back surface with an exposed copper structure that covers the heat sink's projection area, enhancing heat dissipation and integrating a copper foil layer for improved cooling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the copper grounding layer is separated from the semi-circular package to reduce cost, then manufacturing cost is reduced, but heat dissipation effect deteriorates

Engineering Contradiction:
Improvemanufacturing costVSAvoidheat dissipation effect
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The patent moves the power line from the copper grounding layer to the element layer, changing the dimensional arrangement of components. This allows the copper grounding layer to remain intact and connected to the semi-circular package for heat dissipation, while the power line is routed through the element layer to achieve both cost reduction and improved heat dissipation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the power line is placed on the copper grounding layer, then electrical connection is achieved, but heat dissipation effect deteriorates

Engineering Contradiction:
Improveelectrical connectionVSAvoidheat dissipation effect
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent segments the circuit board into two functional layers: the element layer for power distribution and the copper grounding layer for heat dissipation and grounding. This segmentation allows each layer to perform its optimized function without interfering with the other, resolving the contradiction between electrical connection and heat dissipation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The power line is relocated from the copper grounding layer to the element layer, utilizing the vertical dimension of the multi-layer circuit board structure. This dimensional reorganization enables simultaneous optimization of both electrical connection (through the element layer) and heat dissipation (through the intact copper grounding layer).

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If the copper grounding layer is separated from the semi-circular package, then cost is reduced, but yield deteriorates

Engineering Contradiction:
ImprovecostVSAvoidyield
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

By relocating the power line to the element layer and maintaining the copper grounding layer's connection to the semi-circular package, the patent achieves both cost reduction (through simplified grounding layer design) and improved yield (through better heat dissipation and electrical performance).

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly improves heat dissipation and yield by ensuring the copper grounding layer is effectively utilized for cooling and electromagnetic interference reduction, addressing the limitations of traditional designs.

Implementation Method 1

a bypass capacitors, each of which has one end connected with the power pins of the chip body through the element layer and the other end connected with the power line through the power input line

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

an integrated copper foil layer... an exposed copper heat dissipation unit on the chip's back surface... utilizing the copper grounding layer more effectively

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9345124B2Chip and circuit structure
Publication Date: 2016.05.17 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US9345124B2 patent drawing
  • US9345124B2 patent drawing
  • US9345124B2 patent drawing

AI summary

The present invention provides a chip structure and a circuit structure, chip structure is disposed on a printed circuit board provided with an element layer and a copper grounding layer, and comprises: a chip body disposed on the element layer and having a plurality of power pins; a power line disposed on the element layer for supplying electric power to the chip body; a plurality of power input lines, each of which has a body disposed on the copper grounding layer and two ends disposed on the element layer and connected with the body through corresponding through holes of the printed circuit board; and a plurality of bypass capacitors having one end connected with the power pins of the chip body through the element layer and the other end of the bypass capacitors connected with the power line through the power input line. The present invention further provides a chip structure. The power line of the chip structure and the circuit structure of the present invention is disposed on the element layer, so that the heat dissipation effect of the copper grounding layer is better, and the yield of the chip and corresponding circuit structure is improved.