Semiconductor Chip Pressing on Metallization Sections
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Solution Overview
Problem
The challenge in mounting semiconductor chips on carriers is that pressing forces can damage the passivation layer, allowing moisture to reach the chip and degrade its dielectric strength, while also risking damage to the chip's edge sections during bonding processes like low-temperature bonding (LTB).
Innovation Solution
A method where the semiconductor chip is pressed onto a carrier using an application tool that applies force only on continuous chip metallization sections with annularly closed edge sections, avoiding direct pressure on the edge sections to prevent damage, and using a bonding agent layer between the chip and carrier for secure bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pressing force is applied to bond the semiconductor chip to the carrier, then bonding quality is improved, but the passivation layer may be damaged allowing moisture to reach the chip
Solution Approach 1:
The pressing force is applied locally only to the metallization regions of the semiconductor chip, not uniformly across the entire chip surface. This localized pressing approach ensures that the passivation layer remains intact while still achieving sufficient bonding pressure at the metallization-carrier interface, thereby resolving the contradiction between bonding quality and passivation layer protection.
2Reliability
If pressing force is increased to achieve extensive bonding area, then bonding quality is improved, but the edge sections of the chip may be damaged
Solution Approach 1:
The pressing force is concentrated on the metallization regions which are positioned away from the chip edges, allowing extensive bonding area to be achieved without applying stress to the vulnerable edge sections. This spatial differentiation of pressing locations maintains both bonding quality and edge section integrity.
3Manufacturing precision
If pressing force is applied uniformly across the chip, then bonding consistency is improved, but the risk of passivation layer damage increases
Solution Approach 1:
Instead of uniform pressing, the method employs localized pressing exclusively on metallization regions. This approach maintains bonding consistency at the critical electrical contact areas while avoiding unnecessary stress on non-metallized regions where the passivation layer is most vulnerable to damage.
Data Source
AI summary
A semiconductor chip includes a semiconductor body having a bottom side and a top side opposite the bottom side, and passivation arranged on the top side. The semiconductor chip is positioned on the carrier by picking the semiconductor chip and placing the semiconductor chip on the carrier, and pressing the semiconductor chip onto the carrier by a pressing force in a pressing direction, such that the pressing force acts on the semiconductor chip only above one or more continuous chip metallization sections arranged on the top side. Each of the one or more continuous chip metallization sections includes an annularly closed edge section which has a minimum width of more than zero in each direction perpendicular to the pressing direction. The pressing force does not act on the semiconductor chip above any of the edge sections.