Chip Probing Wafer Map Generation via Color-Coded Bin Mapping

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Solution Overview

Problem

Existing methods for generating chip probing wafer maps are resource-intensive and time-consuming, particularly when dealing with large datasets, as they require frequent database access and redrawn maps for even minor changes, leading to prolonged waiting times and excessive storage usage.

Innovation Solution

A method that involves obtaining test data from a wafer, assigning predetermined color codes to bin numbers, and generating a general chip probing wafer map, which can be stored efficiently in a common image format, allowing for simple processing to produce single, composite, or bin-grouping maps as needed, reducing computational resources and storage requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If CP maps are drawn using scheduling technique and stored in database, then maps are available for review, but storage space is occupied and redraw is required for any changes

Engineering Contradiction:
Improvemap availabilityVSAvoidstorage space
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent uses image files as copies of the CP map visual representation, storing only the final graphical output rather than the complete processed data. This allows multiple views to be generated from a single image file, dramatically reducing storage requirements while maintaining map availability for review.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The system performs preliminary processing by generating the CP map image file in advance from the test data, so that the visual representation is ready for immediate review without requiring real-time data processing during user access.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If multiple bin-grouping maps are generated and stored, then different product definitions are supported, but storage space increases significantly

Engineering Contradiction:
Improveproduct definition supportVSAvoidstorage space
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The system creates a universal image file that can serve multiple purposes - it can be viewed as-is or processed further to generate different bin-grouping maps according to various product definitions. This single image file replaces the need to store multiple separate map files for different product configurations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent separates the data processing into stages: first generating a base image file from test data, then applying different bin-grouping configurations as post-processing steps. This segmentation allows the same base image to support multiple product definitions without duplicating storage.

Inventive Principle:
Principle #1Segmentation

3Loss of information

If CP maps are redrawn for parameter changes or new maps, then updated information is provided, but system time and resources are consumed

Engineering Contradiction:
Improveinformation freshnessVSAvoid redraw time
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The system performs the computationally intensive data processing and map generation in advance, creating a ready-to-use image file. This preliminary action eliminates the need for time-consuming redraw operations when users need to view or analyze the maps.

Inventive Principle:
Principle #10Preliminary action

4Speed

If real-time CP map access is implemented, then maps are generated quickly, but system resources are heavily consumed for large datasets

Engineering Contradiction:
Improvemap generation speedVSAvoidsystem resource consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent performs the resource-intensive processing of large test datasets in advance, generating the CP map image file before user access is needed. This shifts the resource consumption to an earlier time when system resources are available, providing fast access during user review without heavy resource demands.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11852673B1Method for generating chip probing wafer map
Publication Date: 2023.12.26 POWERCHIP SEMICON MFG CORP
  • US11852673B1 patent drawing
  • US11852673B1 patent drawing
  • US11852673B1 patent drawing

AI summary

Provided is a method for generating a chip probing wafer map, and the method includes: obtaining test data associated with a first chip, wherein the first chip includes a plurality of sequentially arranged first dies, and each of the first dies belongs to one of a plurality of bin numbers; assigning different predetermined color codes to the bin numbers; and generating a first general chip probing wafer map for the first chip by assigning a color code of each of the first dies as a corresponding predetermined color code according to the bin number to which each of the first dies belongs.