Semiconductor Chip Recesses Preventing Electrode Slippage

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Solution Overview

Problem

In CoC-type semiconductor devices, positional misalignment of semiconductor chips occurs due to slippage of electrodes on the solder layer during lamination, leading to insecure fixing and potential connectivity issues.

Innovation Solution

The semiconductor chips feature recesses on one face side with a decreasing aperture area towards the other face side, accommodating surface bump electrodes within a solder layer, which helps maintain proper alignment and secure connection during lamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If flat surface electrodes are used for lamination, then the manufacturing process is simple, but positional misalignment occurs due to electrode slippage on the solder layer

Engineering Contradiction:

Improvesimplicity of lamination processVSAvoidalignment precision of electrodes

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies curvature by forming the electrodes as protrusions (bumps) rather than flat surfaces. These protruding electrodes engage with corresponding recesses in adjacent chips, creating a mechanical interlock that prevents slippage during lamination while maintaining manufacturing simplicity

Inventive Principle:

Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent implements nesting by having protruding electrodes fit into recesses formed in the adjacent semiconductor chip. This nested structure ensures precise positional alignment and prevents electrode slippage during the lamination process, resolving the contradiction between manufacturing simplicity and alignment precision

Inventive Principle:

Principle #7Nested doll (Nesting)

2Strength

If pressure is applied to fix electrodes during lamination, then connection strength is improved, but electrode slippage increases due to flat surface contact

Engineering Contradiction:

Improveconnection strength of electrodesVSAvoidpositional alignment of electrodes

Core Design Contradiction:

StrengthVSManufacturing precision

Solution Approach 1:

The protruding (curved) electrode geometry provides mechanical interlocking with recesses, preventing slippage even when pressure is applied during lamination. This maintains both connection strength and positional alignment under compression

Inventive Principle:

Principle #14Spheroidality (Curvature)

Solution Approach 2:

The asymmetric protrusion-recess geometry creates directional mechanical interlocking that resists slippage forces during pressure application, ensuring electrodes remain properly aligned while achieving strong connections

Inventive Principle:

Principle #4Asymmetry

Data Source

PatentUS10734322B2Through-holes of a semiconductor chip

Publication Date: 2020.08.04 LONGITUDE LICENSING LTD

AI summary

One semiconductor chip includes a substrate having insulation properties, a plurality of bump electrodes provided on one surface of the substrate, a plurality of recesses provided in the other surface of the substrate, and a solder layer disposed within the recesses. The recesses are formed such that the area of the opening decreases from the other surface side toward the one surface side of the substrate.