Data Reception Chip Internal Reference Voltage Generation
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Solution Overview
Problem
Data reception chips face interference from external noise when accessing memories, affecting the accuracy of received data due to the lack of effective noise filtering and reference voltage generation within the chip.
Innovation Solution
A data reception chip is designed with a comparison module and a voltage generation module that generates a reference voltage using series-connected resistors to divide an operation voltage, reducing external noise interference and eliminating the need for additional pins, thereby enhancing data accuracy and reducing the chip's size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the data reception chip receives external signals to access memory, then data transmission functionality is achieved, but external noise interferes with the accessing operation affecting data accuracy
Solution Approach 1:
The patent extracts the reference voltage generation function from external components and implements it within the data reception chip through an internal voltage generation module. This module generates a reference voltage that tracks the operation voltage, allowing the comparison module to accurately compare received data signals without being affected by external noise. The internal generation of reference voltage isolates the critical comparison function from external interference.
Solution Approach 2:
The patent introduces an voltage generation module as an intermediary component that creates a reference voltage serving as a stable baseline for comparison. This reference voltage acts as a mediator between the operation voltage and the data signal, enabling the comparison module to distinguish valid data transitions from noise by comparing against the tracked reference voltage rather than a fixed external reference.
2Reliability
If additional pins are added to the data reception chip for external reference voltage input, then noise filtering capability is improved, but the chip size and pin count increase
Solution Approach 1:
The patent merges the voltage generation function into the data reception chip itself, combining multiple functions (data reception, reference voltage generation, and comparison) into a single integrated device. This eliminates the need for separate external reference voltage sources and associated pins, reducing device complexity while maintaining noise filtering capability through internal reference voltage tracking.
Solution Approach 2:
The data reception chip performs self-service by generating its own reference voltage internally through the voltage generation module. Instead of relying on external components to provide reference voltage, the chip autonomously generates a reference voltage that tracks its operation voltage, eliminating the need for additional external pins and reducing dependence on external circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively tracks changes in received signals, reducing error rates and maintaining accurate data determination by compensating for operation voltage shifts, while minimizing the number of pins and external noise entry.
Implementation Method 1
The first and second resistors divide a first operation voltage to generate the first reference voltage
Data Source
Figure 1A
Figure 1B
Figure 2A~2B
AI summary
A data reception chip coupled to an external memory including a first input-output pin configured to output first data and including a comparison module and a voltage generation module is provided. The comparison module is coupled to the first input-output pin to receive the first data and to compare the first data with a first reference voltage to identify the value of the first data. The voltage generation module is configured to generate the first reference voltage. The voltage generation module includes a first resistor and a second resistor. The second resistor is connected to the first resistor in series. The first and second resistors divide a first operation voltage to generate the first reference voltage.