Semiconductor Chip Region Wiring to Isolate Defects and Recover Yield

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Solution Overview

Problem

In semiconductor device manufacturing, the integration of multiple chip regions into a single system often results in reduced yield due to defects, such as leakage or short-circuiting of power wires, making it difficult to prevent the entire system from becoming defective.

Innovation Solution

A method is introduced where each chip region on a substrate is inspected to determine if it is non-defective or defective, and wiring is formed only with electrodes of non-defective chip regions, bypassing defective ones, to prevent system-wide defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple chip regions are integrated into a single system, then system functionality is improved, but manufacturing yield deteriorates due to defects in individual chip regions affecting the entire system

Engineering Contradiction:
Improvesystem functionalityVSAvoidmanufacturing yield
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The substrate is divided into multiple independent chip regions, each capable of being inspected and evaluated separately. This segmentation allows the system to identify and isolate defective regions without compromising the functionality of non-defective regions, thereby maintaining high manufacturing yield while achieving system-level functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different chip regions on the substrate are treated with different quality assessments based on their inspection results. Non-defective regions are connected through wiring, while defective regions are isolated. This local quality approach ensures that only functional regions contribute to the final product, resolving the contradiction between system functionality and manufacturing yield.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If wiring is formed to connect all chip regions, then system integration is improved, but defect propagation worsens when leakage or short-circuiting occurs

Engineering Contradiction:
Improvesystem integrationVSAvoiddefect propagation
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

Defective chip regions are extracted from the system by isolating them through selective wiring formation. The wiring is configured to connect only non-defective chip regions, effectively removing the source of potential defects such as leakage or short-circuiting from the functional system, thereby preventing defect propagation while maintaining system integration.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The wiring structure acts as an intermediary that selectively connects chip regions based on their inspection results. This intermediary mechanism allows the system to achieve integration of functional regions while blocking the propagation of defects from defective regions, resolving the contradiction between system integration and defect propagation.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If inspection is performed on each chip region, then manufacturing yield is improved by identifying non-defective regions, but process complexity worsens

Engineering Contradiction:
Improvemanufacturing yieldVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Inspection of each chip region is performed as a preliminary action before wiring formation. This advance inspection allows the manufacturing process to identify non-defective regions early, enabling selective wiring connection and isolation of defective regions. The preliminary inspection action simplifies subsequent processing by providing clear guidance on which regions to connect, thereby improving manufacturing yield without excessively increasing overall process complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11996335B2Manufacturing method of semiconductor device
Publication Date: 2024.05.28 KIOXIA CORP
  • US11996335B2 patent drawing
  • US11996335B2 patent drawing
  • US11996335B2 patent drawing

AI summary

A manufacturing method of a semiconductor device includes inspecting each of plural chip regions of a substrate and determining the inspected chip region as a non-defective chip region or a defective chip region, the substrate including the plural chip regions formed as one system, and the plural chip regions being arranged in a planar direction on the substrate. The method includes forming a wiring, the wiring being connected to an electrode of the non-defective chip region among the plural chip regions, and the wiring being not connected to an electrode of the defective chip region among the plural chip regions.