Chip Resistor Double-Layer Structure for High Resistance Stability
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Solution Overview
Problem
Conventional chip resistors face challenges in increasing resistance while maintaining power tolerance and stability, as methods to enhance resistance, such as reducing layer thickness or increasing laser cuts, lead to decreased power stability and thermal effects affecting electrical performance.
Innovation Solution
A chip resistor with a double-layer series resistance structure, comprising a front resistance layer and a back resistance layer, which increases the maximum resistance by at least 1.5 times, reduces voltage gradient per unit length, and enhances heat dissipation area, thereby increasing operating power and maximum operating voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the thickness of the resistance layer is reduced to increase resistance, then the resistance value increases, but the power tolerance decreases
Solution Approach 1:
The patent transitions from a single-layer resistance structure to a multi-layer resistance structure, adding the vertical dimension to the resistance path design. By stacking multiple resistance layers (typically 2-5 layers) with alternating conductive patterns, the total resistance is achieved through the cumulative effect of multiple layers rather than relying on a single thin layer, thus maintaining both high resistance and adequate power tolerance.
Solution Approach 2:
The resistance layer is divided into multiple segments stacked vertically. Each layer contains conductive patterns (such as meandering or grid patterns) that are electrically connected through vias between layers. This segmentation allows the resistance to be distributed across multiple layers, preventing any single layer from being too thin while achieving the required total resistance value.
2Measurement precision
If the number of laser cuts is increased to increase the current path, then the resistance increases, but the spacing between lines becomes too close causing thermal effects that reduce electrical performance stability
Solution Approach 1:
Instead of increasing laser cuts in the planar direction (2D), the patent utilizes the vertical stacking of multiple resistance layers to increase the effective current path length. The conductive patterns in each layer are connected through vias to the next layer, creating a 3D current path that achieves higher resistance without requiring excessive planar cutting that would reduce line spacing and cause thermal issues.
3Measurement precision
If the current path of the resistance layer is increased to reduce voltage gradient, then the maximum operating voltage increases, but the cross-sectional area of the current path decreases resulting in decreased power stability
Solution Approach 1:
The patent resolves this contradiction by extending the current path into the vertical dimension through multi-layer stacking. The cross-sectional area for heat dissipation remains large because the heat can dissipate through multiple layers and their associated conductive patterns. The voltage gradient is reduced by the cumulative length of the current path across multiple layers, while the power stability is maintained because the effective cross-sectional area for heat dissipation is distributed across the layered structure rather than confined to a single thin plane.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The double-layer series resistance structure significantly increases the maximum resistance of the chip resistor, reduces voltage gradient, and enhances heat dissipation, resulting in higher operating power and maximum operating voltage while maintaining stability.
Implementation Method 1
According to Ohm's law of resistance, the longer the current path is, the greater the resistance is
Implementation Method 2
laser cutting is used to change the current path of the resistance layer
Implementation Method 3
The thermal effect of laser processing will affect the resistance layer, which reduces the stability of electrical performance of the chip resistor
Data Source
AI summary
A chip resistor includes a substrate, first and second conductive structures in the substrate, first to third front electrodes and first to third back electrodes respectively on front and back surfaces of the substrate, first and second resistance layers respectively on the front and back surfaces, and first and second external electrode layers. The first to third front electrodes are opposite to the first to third back electrodes. The first back electrode and the first front electrode are connected to the first conductive structure. The first resistance layer is connected to the second front electrode and the second conductive structure. The second resistance layer is connected to the first and third back electrodes and the first and second conductive structures. The first and second external electrode layers respectively connect the first front electrode and the first back electrode, and the second front electrode and the second back electrode.