Chip Resistor Indented Patterns Adhesion
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Solution Overview
Problem
Conventional chip resistor devices face issues such as high manufacturing costs, high temperature coefficient of resistance, short-circuit problems due to narrow distances, and reduced usable area due to electrode design and pin-hole formation, leading to potential malfunctions and sintering deformation.
Innovation Solution
A chip resistor device with an insulating substrate featuring indented patterns on the surface for contact electrodes and resistors, fabricated using interlaced splitting grooves and pasty conductive materials, where electrodes are formed only on the first surface, eliminating the need for lateral surface electrodes and reducing manufacturing costs and TCR.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If electrodes are formed on long lateral surfaces and second surface to provide adhesion strength, then adhesion strength is improved, but manufacturing cost increases and temperature coefficient of resistance increases
Solution Approach 1:
The patent extracts the electrode formation from the lateral surfaces and second surface, confining electrodes only to the first surface. This eliminates the complex multi-surface electrode structure while maintaining adhesion through optimized first-surface electrode design and indented pattern geometry, thereby reducing manufacturing cost and TCR.
Solution Approach 2:
The patent introduces indented patterns that create vertical depth dimension on the first surface, forming three-dimensional electrode structures with increased surface area and adhesion volume. This compensates for the reduced lateral surface coverage, maintaining adhesion strength while simplifying the overall structure.
2Reliability
If electrodes extend onto first surface to form electrical path, then electrical contact is improved, but collision risk increases causing malfunction
Solution Approach 1:
The patent segments the electrode structure into distinct functional zones: indented pattern regions for adhesion and electrical contact, and flat regions for mechanical protection. This segmentation allows the electrode to maintain electrical functionality while reducing the exposed surface area vulnerable to collision.
Solution Approach 2:
The patent applies different surface qualities to different regions: indented patterns provide enhanced adhesion and electrical contact in specific locations, while the overall reduced electrode footprint minimizes collision risk. The local optimization of electrode geometry achieves both electrical reliability and mechanical robustness.
3Area of moving object
If chip resistor device is miniaturized to reduce size, then device size is reduced, but short-circuit problem occurs due to narrow distance between resistor units
Solution Approach 1:
The patent utilizes the vertical dimension through indented patterns to increase electrode adhesion volume and electrical contact area without increasing the horizontal footprint. This allows miniaturization while maintaining sufficient electrical isolation and adhesion, preventing short-circuits in compact configurations.
Solution Approach 2:
The patent changes the electrode geometry parameters by creating indented patterns with controlled depth and width, increasing the effective adhesion area and electrical contact quality without proportionally increasing the overall device area. This parameter optimization enables reliable miniaturization.
4Productivity
If pin-holes are formed during manufacturing, then manufacturing process is completed, but sintering deformation occurs and usable area is reduced
Solution Approach 1:
The patent incorporates indented patterns in the substrate before electrode and resistor formation. These pre-formed patterns provide structural guidance and stress distribution that prevent sintering deformation during subsequent manufacturing processes, eliminating the need for pin-hole formation while maintaining manufacturing feasibility.
Data Source
AI summary
A chip resistor device includes an insulating substrate, two indented patterns, and a resistor unit. The insulating substrate has opposite first and second surfaces. The first surface has two opposite edges and two electrode forming regions adjacent to the two opposite edges, respectively. The indented patterns are respectively formed in the electrode forming regions of the first surface and indented from the first surface. The resistor unit includes two contact electrodes respectively formed on the electrode forming regions of the first surface and filled into the indented patterns, and a resistor formed on the first surface between the two contact electrodes and electrically contacting the contact electrodes.