Chip Resistor Parallel Films for Thermal Management
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Solution Overview
Problem
Conventional chip resistors with a single resistor film between terminal electrodes experience excessive temperature increase when used in high-power circuits, and arranging multiple resistor films in parallel complicates equal resistance trimming.
Innovation Solution
A chip resistor design featuring multiple resistor films on an insulating substrate with individually connected upper electrodes and side electrodes, covered by a coat, allows for independent trimming and equal resistance adjustment, reducing temperature rise by distributing power evenly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If multiple resistor films are arranged in parallel on the insulating substrate, then the power supplied between terminal electrodes is divided and temperature increase in each resistor film is suppressed, but it becomes extremely difficult to make the dimensions of trimming grooves of all resistor films equal and thus difficult to make the resistances of all resistor films equal
Solution Approach 1:
The insulating substrate is divided into multiple regions, each containing a resistor film with its own trimming groove. This segmentation allows independent trimming of each resistor film while maintaining equal dimensions through standardized groove patterns, resolving the contradiction between temperature suppression and manufacturing precision.
Solution Approach 2:
Each resistor film region is given identical local characteristics including trimming groove dimensions, orientation, and positioning relative to terminal electrodes. This local quality standardization ensures equal resistance values across all resistor films while allowing parallel configuration for temperature management.
2Device complexity
If a single resistor film is provided between paired terminal electrodes, then the structure is simple, but all power supplied between electrodes concentrates on the resistor film causing excessive temperature increase
Solution Approach 1:
The single resistor film is segmented into multiple parallel resistor films arranged on the insulating substrate. This segmentation distributes the power load across multiple films, reducing temperature increase while maintaining relative structural simplicity through a systematic parallel arrangement.
Solution Approach 2:
The resistor films are arranged in parallel along the longitudinal direction of the insulating substrate, utilizing the dimensional space available on the substrate surface. This dimensional arrangement allows multiple films to coexist without significantly increasing structural complexity while effectively distributing power and heat.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively suppresses excessive temperature increase across resistor films, ensuring consistent resistance and improved performance in high-power circuits by allowing independent trimming and even power distribution.
Implementation Method 1
a cover coat formed on the obverse surface of the insulating substrate to cover the resistor films
Implementation Method 2
the power supplied between the paired terminal electrodes is divided into each resistor film. Hence, the temperature increase in the respective resistor films is suppressed
Data Source
AI summary
The chip resistor (1) of the present invention includes an insulating substrate (2) in the form of a chip, a pair of terminal electrodes (3, 4) formed on both ends of the insulating substrate (2), a plurality of resistor films (5) formed on an obverse surface of the insulating substrate (2) in parallel with each other between the paired terminal electrodes (3, 4), and a cover coat formed on the obverse surface of the insulating substrate (2) to cover the resistor films (5). In the chip resistor (1), one of the terminal electrodes (3) includes individual upper electrodes (8) each formed on the obverse surface of the insulating substrate (3, 4) to be independently connected to a respective one of the resistor films (5) and a side electrode (9) formed on a side surface of the insulating substrate (2) to be connected to all the individual upper electrodes (8).