Chip Resistor With Stacked Electrodes for Reduced Thickness
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Solution Overview
Problem
Conventional chip resistors have limitations in achieving a reduced thickness and improved heat dissipation performance due to the need for thick electrodes, which affects their overall strength and efficiency in electronic applications.
Innovation Solution
A chip resistor design featuring an insulating substrate with a resistor embedded within, where the first and second electrodes are spaced apart in a direction perpendicular to the substrate's thickness, and an electroconductive bonding portion between the chip resistor and mounting substrate, facilitating reduced thickness and enhanced heat dissipation through a high heat conductance insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the plate-shaped electrodes are made thick to ensure appropriate strength, then the structural strength is improved, but the overall thickness of the chip resistor increases
Solution Approach 1:
The patent transitions from conventional planar electrode arrangement to a three-dimensional stacked configuration where electrodes are arranged in multiple layers above and below the insulating substrate. This vertical stacking in the thickness direction enables reduced electrode thickness while maintaining overall structural strength through the multi-layer reinforcement architecture.
Solution Approach 2:
The patent employs a composite structure combining the insulating substrate with multiple electrode layers (first and second electrodes) stacked in the thickness direction. This composite arrangement allows each electrode layer to be thinner while the combined structure provides the necessary mechanical strength, resolving the contradiction between thinness and strength.
2Ease of manufacture
If conventional chip resistor structures are used, then manufacturing simplicity is maintained, but heat dissipation performance is insufficient
Solution Approach 1:
The patent introduces a thermal conduction layer extending in the thickness direction beneath the insulating substrate, creating a vertical heat dissipation pathway. This three-dimensional thermal management structure enhances heat dissipation performance while maintaining compatibility with conventional manufacturing processes for forming and integrating the thermal conduction layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design allows for a chip resistor with reduced thickness and improved heat dissipation performance, preventing overheating and maintaining structural integrity by efficiently dissipating heat and matching thermal expansion coefficients with the mounting substrate.
Implementation Method 1
an electroconductive bonding portion disposed between the mounting substrate and the chip resistor
Implementation Method 2
enhanced heat dissipation through a high heat conductance insulating layer
Data Source
AI summary
A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.