Chip Resistor Surface Electrode Inductance Reduction
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Solution Overview
Problem
Conventional low-resistance chip resistors face challenges in further reducing resistance due to inductance from end-face electrodes and manufacturing yield issues during substrate division, particularly when using copper-nickel alloy resistive elements.
Innovation Solution
A chip resistor design featuring a resistive element on the lower surface of a ceramic substrate with two-layer electrode structures that bypass end-face electrodes during mounting, allowing for reduced inductance and improved TCR characteristics, and positioning the resistive element within the peripheral border to avoid division grooves, enhancing manufacturing yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If end-face electrodes are extended from lower end to upper end of ceramic substrate, then electrical connection is established, but resistance increases due to inductance
Solution Approach 1:
The patent transitions from a conventional through-hole electrode structure (extending vertically through the substrate) to a surface-layer electrode structure (positioned on the upper surface only). This dimensional change eliminates the inductance problem by removing the long vertical path while maintaining electrical connection functionality through alternative routing on the surface.
Solution Approach 2:
The patent extracts the electrode function from the end-face electrodes and relocates it to electrode layers formed on the upper surface. The end-face electrodes are removed or minimized, and their electrical connection function is taken over by the electrode layers that directly contact the resistive element, thereby eliminating the source of inductance.
2Manufacturing precision
If resistive element is formed across primary division break groove, then low resistance is achieved, but manufacturing yield deteriorates
Solution Approach 1:
The patent applies local quality by positioning the resistive element specifically within the safe area (inside the peripheral border) of the ceramic substrate, away from the break grooves. This localized positioning ensures that the resistive element does not intersect with division lines during substrate splitting, preventing manufacturing defects while maintaining electrical performance.
Solution Approach 2:
The patent performs preliminary action by pre-positioning the resistive element within the safe area before the substrate division process. This advance planning and positioning ensure that subsequent substrate splitting operations will not damage the resistive element, thereby guaranteeing manufacturing yield.
3Reliability
If copper-nickel alloy is used for resistive element, then low TCR is achieved, but resistance cannot be further decreased due to inductance
Solution Approach 1:
The patent uses copper-nickel alloy for the resistive element to achieve low TCR, and simultaneously employs a surface-layer electrode structure instead of through-hole electrodes. This dimensional change eliminates the inductance problem, allowing the copper-nickel alloy's low TCR特性 to be fully utilized without being compromised by inductance from extended end-face electrodes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively lowers resistance and improves TCR characteristics while increasing mounting strength and manufacturing efficiency by bypassing end-face electrodes and avoiding primary division grooves, resulting in improved reliability and cost-effectiveness.
Implementation Method 1
the plating layer is soldered to a wiring pattern on a circuit board with the first and second electrode layers positioned on the wiring pattern to mount the chip resistor on the circuit board
Implementation Method 2
a resistive element that is placed on the lower surface of the ceramic substrate, positioned within a region inside the peripheral border of the lower surface, and made mainly of copper
Data Source
AI summary
The chip resistor 10 includes a ceramic substrate 11 that is shaped like a rectangular parallelepiped. Mounted on the lower surface of the ceramic substrate 11 are a resistive element 12 that is made mainly of a low-resistance, low-TCR copper-nickel alloy, first and second electrode layers 13, 14 that form a two-layer structure and cover both longitudinal ends of the resistive element 12, and an insulating protective layer 15 for covering the remaining area of the resistive element 12. The resistive element 12 is positioned within a region inside the peripheral border of the lower surface of the ceramic substrate 11. The chip resistor 10 also includes end-face electrodes 17 that are positioned on both longitudinal end faces of the ceramic substrate 11. The second electrode layers 14 and end-face electrodes 17 are covered by plating layers 18-21. This chip resistor 10 is to be face-down mounted with both electrode layers 13, 14 positioned on a wiring pattern 31 of a circuit board 30.