Chip Resistor Terminal Electrode Wrapping for Connection Reliability
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Solution Overview
Problem
The connection reliability between front electrodes and terminal electrodes in chip resistors deteriorates when the size of the external shape is reduced, particularly when the terminal electrodes are formed on a flattened upper surface of the protection layer, leading to unreliable connections.
Innovation Solution
The chip resistor design exposes front electrodes from the widthwise and lengthwise end surfaces of the insulating substrate, allowing terminal electrodes to wrap around and connect to these exposed portions, enhancing connection reliability by using thick film portions or recesses to increase the connection area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If terminal electrodes are formed on a flattened upper surface of the protection layer, then wide and flat terminal electrodes can be achieved, but connection reliability between front electrodes and terminal electrodes deteriorates
Solution Approach 1:
The terminal electrodes extend not only horizontally to provide wide flat front surfaces but also vertically by wrapping around the side surfaces of the insulating substrate. This three-dimensional configuration allows the terminal electrodes to contact the front electrodes through multiple surfaces (front surface and side surfaces), thereby maintaining connection reliability while achieving the desired flat wide front surface geometry.
Solution Approach 2:
The terminal electrodes are configured to wrap around the side surfaces of the insulating substrate, effectively nesting the connection path within the substrate structure. This allows the terminal electrodes to access and connect to the front electrodes through the exposed portions at the side surfaces, creating a reliable connection path that is integrated within the overall component structure.
2Volume of moving object
If the size of the chip resistor is reduced, then miniaturization is achieved, but connection reliability deteriorates due to very thin front electrode thickness
Solution Approach 1:
By extending the terminal electrodes to wrap around the side surfaces of the insulating substrate, the connection area is increased in the vertical dimension. This compensates for the reduced thickness of the front electrodes in miniaturized components, as the terminal electrodes make contact through both the front surface and the side surfaces, effectively distributing the connection load across a larger total area.
Solution Approach 2:
The invention exposes specific portions of the front electrodes at the side surfaces of the insulating substrate, creating localized connection regions with enhanced contact area. This local exposure strategy allows the terminal electrodes to establish reliable connections at critical points without requiring the entire front electrode structure to be thick, thereby maintaining connection reliability in miniaturized components.
3Reliability
If front electrodes are exposed from end surfaces of the insulating substrate, then terminal electrodes can wrap around to connect reliably, but manufacturing complexity increases
Solution Approach 1:
The formation of the protection layer and the exposure of front electrode portions are integrated into a unified manufacturing process. The protection layer is applied to cover specific areas while leaving the side surface portions of the front electrodes exposed, and the terminal electrodes are then formed to wrap around and contact these exposed portions. This combined approach achieves reliable connections without requiring separate complex processing steps for each function.
Data Source
AI summary
In order to provide a chip resistor which has wide and flat terminal electrodes in its front surface and which has high connection reliability between front electrodes and the terminal electrodes, a chip resistor according to the present invention includes: an insulating substrate 1 shaped like a cuboid; a pair of front electrodes 2 provided on lengthwise opposite edge portions of a front surface of the insulating substrate 1; a resistor body 3 provided between the front electrodes 2; an insulating protection layer 4 covering entire surfaces of the front electrodes 2 and the resistor body 3; and a pair of terminal electrodes 5 provided on lengthwise opposite end surfaces of the insulating substrate 1. The chip resistor is configured such that the front electrodes 2 sandwiched between the insulating substrate 1 and the protection layer 4 are exposed from widthwise end surfaces and the lengthwise end surfaces of the insulating substrate 1, and the terminal electrodes 5 wrap around the widthwise opposite end surfaces of the insulating substrate 1 to be thereby connected to the exposed portions of the front electrodes 2.