Chip ROM Exception Handling With Backup Code Switching

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Solution Overview

Problem

Existing computer-based devices using Read-Only Memory (ROM) face issues when abnormal codes in the ROM cause abnormal chip operations, leading to potential malfunction.

Innovation Solution

A method and apparatus that reads a target code from the ROM, identifies if it is an exception code, and if so, withholds execution, instead reading and executing a second target code from a designated storage space.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If codes are stored in ROM for fast access and simple structure, then reading speed and structure simplicity are improved, but abnormal codes in ROM cause chip malfunction and reliability deteriorates

Engineering Contradiction:

Improvereading speedVSAvoidchip operation reliability

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent segments the code storage function by separating ROM (for fast reading) from a configurable storage space (for backup and alternative codes). The CPU independently controls code selection between these segments, allowing fast access from ROM while maintaining reliability through alternative code sources when abnormalities are detected.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter of code source configurability by introducing a configurable storage space that can be set to different modes (normal mode using ROM, abnormal mode using backup codes). This parameter change allows the system to adapt between speed optimization and reliability assurance based on operational conditions.

Inventive Principle:

Principle #35Parameter changes

2Device complexity

If ROM is used to store target codes, then structure simplicity and power consumption are improved, but when abnormal codes occur, costly and time-consuming re-taping processes are required

Engineering Contradiction:

Improvestructure simplicityVSAvoidmanufacturing cost and time

Core Design Contradiction:

Device complexityVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by pre-storing backup target codes in a configurable storage space before runtime. When abnormal codes are detected in ROM, the system can immediately switch to pre-prepared backup codes without requiring costly re-taping processes, thus resolving the manufacturing cost and time issue while maintaining structural simplicity.

Inventive Principle:

Principle #10Preliminary action

3Duration of action of moving object

If exception codes are executed from ROM, then code execution continuity is maintained, but abnormal chip operations occur

Engineering Contradiction:

Improvecode execution continuityVSAvoidchip operation normality

Core Design Contradiction:

Duration of action of moving objectVSReliability

Solution Approach 1:

The patent implements feedback by having the CPU identify and detect exception codes during the code execution process. When an exception is detected, the system provides feedback to switch from ROM to the configurable storage space for alternative codes, maintaining execution continuity while ensuring operational normality through closed-loop control.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS20250245136A1Method and apparatus for controlling chip, chip, electronic device, and storage medium

Publication Date: 2025.07.31 BEIJING X RING TECHNOLOGY CO LTD

AI summary

A method for controlling a computer chip including a CPU and a ROM includes: reading a first target code from the ROM of the chip, identifying whether the first target code is an exception code, and in response to the first target code being the exception code, not executing the first target code, reading a second target code from a set storage space of the chip, and executing the second target code.