Chip-Scale Package Dam for Lens Alignment
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Solution Overview
Problem
The alignment of lens assemblies with image sensors in camera modules is hindered by non-uniform adhesive layer heights, which can lead to suboptimal image quality due to improper optical axis alignment.
Innovation Solution
The implementation of a chip-scale package design featuring a dam and adhesive layer configuration that ensures a uniform top surface, along with a redistribution layer and insulative substrate, facilitates precise alignment of the lens assembly with the image sensor by maintaining a consistent height and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If adhesive is applied to bond cover glass to semiconductor substrate, then bonding strength is improved, but adhesive layer height becomes non-uniform causing alignment errors
Solution Approach 1:
The patent introduces a dam structure as an intermediary element between the adhesive layer and the cover glass/substrate interface. The dam confines the adhesive to a specific region, preventing it from spreading unevenly and creating a non-uniform top surface. This mediator allows the adhesive to maintain both strong bonding and uniform height, resolving the contradiction between bonding strength and alignment precision.
2Reliability
If adhesive layer is made thicker to ensure complete coverage, then bonding reliability is improved, but top surface uniformity deteriorates
Solution Approach 1:
The dam structure creates a localized region where adhesive can be applied with consistent thickness. By confining the adhesive within the dam boundaries, the system ensures complete coverage and reliable bonding within that specific area while maintaining a uniform top surface that extends beyond the adhesive region. This local confinement strategy resolves the contradiction between bonding reliability and top surface uniformity.
3Device complexity
If conventional bonding method is used without dam structure, then manufacturing complexity is reduced, but alignment accuracy and image quality deteriorate
Solution Approach 1:
The dam structure is formed prior to adhesive application, establishing predetermined boundaries that guide the adhesive placement. This preliminary action ensures that when adhesive is applied, it automatically conforms to the desired uniform thickness and coverage area, eliminating the need for complex post-bonding adjustment processes and ensuring high alignment accuracy without significantly increasing manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures accurate and reproducible alignment of the lens assembly, enhancing image quality by maintaining a uniform top surface and facilitating optimal optical axis alignment, thereby improving the overall performance of camera modules.
Implementation Method 1
The adhesive layer is (i) located between the cover glass and the semiconductor substrate, (ii) at least partially surrounding the dam, and (iii) configured to adhere the cover glass to the semiconductor substrate
Data Source
AI summary
An image sensor chip-scale package includes a pixel array, a cover glass covering the pixel array, a dam, and an adhesive layer. The pixel array is embedded in a substrate top-surface of a semiconductor substrate. The semiconductor substrate includes a plurality of conductive pads in a peripheral region of the semiconductor substrate surrounding the pixel array. The dam at least partially surrounds the pixel array and is located (i) between the cover glass and the semiconductor substrate, and (ii) on a region of the substrate top-surface between the pixel array and the plurality of conductive pads. The adhesive layer is (i) located between the cover glass and the semiconductor substrate, (ii) at least partially surrounding the dam, and (iii) configured to adhere the cover glass to the semiconductor substrate.