Chip-Scale LED Reflective Structure Against Solder Diffusion

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Solution Overview

Problem

Chip-scale package type light emitting diodes face issues with solder diffusion contaminating the ohmic reflection layer, leading to reliability concerns and a lack of resistance to electrical overstress or electrostatic discharge.

Innovation Solution

A light emitting diode design incorporating a reflective structure with a conductive oxide layer, dielectric layer, and metal reflection layer instead of a conventional ohmic reflection layer, along with strategically positioned openings in the dielectric layer to prevent solder diffusion and enhance electrical overstress resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a flip-chip shape electrode structure with ohmic reflection layer is used, then luminous efficiency and heat dissipation characteristics are improved, but solder diffusion contaminates the ohmic reflection layer causing defects

Engineering Contradiction:
Improveluminous efficiencyVSAvoidsolder diffusion contamination
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a dielectric layer as an intermediary barrier between the ohmic reflection layer and the bonding pad where solder is applied. This dielectric layer with controlled openings prevents solder from directly contacting and contaminating the ohmic reflection layer, while still allowing the flip-chip electrode structure to maintain its excellent luminous efficiency and heat dissipation characteristics.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the electrode structure by introducing a dielectric layer with strategically placed openings between the ohmic reflection layer and the bonding pad. This segmentation isolates the ohmic reflection layer from solder contamination while maintaining the functional integrity of the flip-chip electrode structure for light emission and heat dissipation.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If chip-scale package type is used to simplify manufacturing, then manufacturing time and cost are reduced, but protection against electrical overstress or electrostatic discharge is lost

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidelectrical overstress resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent incorporates a protective structure consisting of a dielectric layer with controlled openings before the bonding pad area, which acts as a cushioning barrier against electrical overstress and electrostatic discharge. This protective measure is built into the chip-scale package structure itself, maintaining manufacturing simplicity while providing necessary electrical protection.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If bonding material is applied to electrode for electrical connection, then electrical connectivity is achieved, but solder diffusion contaminates the ohmic reflection layer

Engineering Contradiction:
Improveelectrical connectivityVSAvoidsolder diffusion
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating a dielectric layer with selectively placed openings that allow bonding material to contact only specific electrode regions while blocking access to the ohmic reflection layer. This localized approach enables electrical connectivity through the bonding pad while preventing solder diffusion contamination of the reflective surface.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves the reliability of the light emitting diode by preventing solder diffusion, achieving stable ohmic contact resistance, high light output, and low forward voltage, while also providing resistance to electrical overstress and electrostatic discharge.

Implementation Method 1

a metal reflection layer, disposed on the dielectric layer, and connecting to the conductive oxide layer through the openings of the dielectric layer

Methodology Applied
Scientific EffectLight reflection: Reflection

Data Source

PatentUS20240055563A1Chip-scale package light emitting diode
Publication Date: 2024.02.15 SEOUL VIOSYS CO LTD
  • US20240055563A1 patent drawing
  • US20240055563A1 patent drawing
  • US20240055563A1 patent drawing

AI summary

A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.