Chip Scale Package Color Marking for Readable CSP Identification
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Solution Overview
Problem
Existing pattern marking technologies for semiconductor chip scale packages (CSPs) face challenges in creating readable identifiers on small CSPs due to limited surface area and resolution limitations of current marking processes.
Innovation Solution
The use of colour-coded markings applied through integrated process steps during CSP fabrication, such as Atomic Layer Deposition (ALD) for forming insulation layers with specific thicknesses of Aluminium Oxide (Al2O3) and Titanium Dioxide (TiO2), allows for machine and human readable identifiers on CSPs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional pattern marking technologies (laser ablation, photolithography) are used on small CSPs, then marking can be applied to the surface, but the resolution is insufficient and the variability is limited due to the small surface area
Solution Approach 1:
The patent applies color-coded markings instead of traditional pattern markings. By using different colors (achieved through controlled thickness of insulating material layers), the system can encode multiple pieces of information (part number, date code, etc.) without requiring high-resolution pattern printing. This resolves the contradiction by trading pattern resolution for color differentiation, which is more effective on small surfaces.
Solution Approach 2:
The patent changes the parameter used for marking from spatial pattern (requiring high resolution) to optical property (color/reflection characteristics). By controlling the thickness of insulating material layers to produce different colors, the system achieves high-information-density marking on small CSP surfaces without being constrained by laser or camera resolution limits.
2Loss of information
If laser ablation is used for pattern marking, then material can be removed to form markings, but the process is limited by laser resolution and is expensive for small CSPs
Solution Approach 1:
The patent merges the marking function with the insulating material deposition process. Instead of adding a separate marking step (laser ablation or photolithography), the insulating layers are deposited with controlled thicknesses that inherently produce the desired color-coded markings. This integration eliminates expensive post-processing marking steps while maintaining high information encoding capacity.
Solution Approach 2:
The patent uses color-coded markings achieved through controlled thickness of insulating material layers. Different colors represent different information (part numbers, date codes, etc.), providing high information encoding capacity without requiring expensive high-resolution laser marking processes.
3Manufacturing precision
If photolithography with etching is used for pattern marking, then markings can be transferred to the substrate, but the process is limited by inspection camera resolution and is complex
Solution Approach 1:
The patent merges the marking function with the insulating material deposition process. Instead of adding a separate marking step (laser ablation or photolithography), the insulating layers are deposited with controlled thicknesses that inherently produce the desired color-coded markings. This integration eliminates expensive post-processing marking steps while maintaining high information encoding capacity.
Solution Approach 2:
The patent uses color-coded markings achieved through controlled thickness of insulating material layers. Different colors represent different information (part numbers, date codes, etc.), providing high information encoding capacity without requiring expensive high-resolution laser marking processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of machine and human readable identifiers on CSPs with increased variability and accuracy, overcoming the limitations of traditional marking technologies by utilizing colour-coded markings that do not require pattern marking on small surfaces.
Implementation Method 1
The use of colour-coded markings applied through integrated process steps during CSP fabrication, such as Atomic Layer Deposition (ALD) for forming insulation layers with specific thicknesses of Aluminium Oxide (Al2O3) and Titanium Dioxide (TiO2)
Data Source
Figure 1~2
Figure 3
Figure 4a~4c
AI summary
The present invention relates to a semiconductor chip scale package comprising: a semiconductor die (102), the semiconductor die comprising: a first major surface opposing a second major surface; a plurality of side walls extending between the first major surface and second major surface; a plurality of electrical contacts (104) arranged on the second major surface of the semiconductor die; and an insulating material (106) disposed on the plurality of side walls and on the first major surface, said insulating material comprising a machine readable identifier by which a semiconductor chip scale packaging type is identifiable by an identification apparatus that reads said machine readable identifier, wherein said machine readable identifier comprises a colour component.