Chip Security Fingerprint via Self-Assembled Block Copolymers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The proliferation of counterfeit semiconductor chips in modern manufacturing lacks a viable solution, as conventional numerical identification methods can be forged by unauthorized manufacturers.
Innovation Solution
A unique on-chip fingerprint is created using the random pattern formation of unguided, self-assembled block copolymers (BCPs) during chip fabrication, which is analogous to a human fingerprint for authentic chip identification, integrated into the BEOL dielectric layer with a crossbar sensing network for secure reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional numerical identification methods are used to identify semiconductor chips, then chip identification is simple and straightforward, but the identification can be forged by unauthorized manufacturers leading to counterfeit chips
Solution Approach 1:
The block copolymers self-assemble into random patterns without requiring external guidance or intervention during the fingerprint formation process. The system uses the inherent self-organizing properties of BCPs to automatically generate unique patterns, eliminating the need for complex external patterning equipment or processes while ensuring authentic, non-forgeable identification.
Solution Approach 2:
Block copolymers serve as an intermediary material that translates standard semiconductor fabrication processes into unique fingerprint patterns. The BCPs mediate between conventional manufacturing capabilities and the desired security feature, allowing existing fabrication equipment to produce authentic identification without requiring entirely new manufacturing approaches.
2Reliability
If unguided self-assembled BCPs are used to form random patterns for chip fingerprints, then unique identification is achieved, but additional processing steps are required
Solution Approach 1:
The patent combines the fingerprint formation process with the existing BEOL dielectric layer fabrication process. The BCP self-assembly, etch template formation, and trench etching are integrated into the standard back-end-of-line manufacturing sequence, allowing fingerprint creation to occur concurrently with normal chip fabrication rather than as a separate post-processing step.
Solution Approach 2:
The block copolymer layer is deposited and self-assembled into random patterns before the main BEOL dielectric layer is fully processed. This preliminary formation of the fingerprint pattern allows subsequent fabrication steps to proceed around or through the established pattern, ensuring the identification feature is locked in early while maintaining flexibility for remaining manufacturing operations.
3Measurement precision
If a crossbar sensing network is added to read the chip fingerprint, then secure reading capability is provided, but device structure becomes more complex
Solution Approach 1:
The crossbar sensing network uses standard semiconductor interconnect structures that serve multiple functions: they provide electrical connections for the fingerprint reading operation while also serving as part of the overall chip interconnect architecture. This multi-functionality allows the sensing capability to be integrated without proportionally increasing device complexity, as the same structural elements perform both sensing and interconnection roles.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method provides a secure and unique identification for each semiconductor chip, deterring counterfeit production by utilizing the random pattern formed by BCPs, which is embedded and reliably readable, enhancing chip security without additional processing steps.
Implementation Method 1
depositing layer of BCPs on the BEOL dielectric layer, annealing the BCPs and forming a self-assembled random pattern
Data Source
AI summary
Various methods and structures for fabricating a semiconductor chip structure comprising a chip identification “fingerprint” layer. A semiconductor chip structure includes a substrate and a chip identification layer disposed on the substrate, the chip identification layer comprising random patterns of electrically conductive material in trenches formed in a semiconductor layer. The chip identification layer is sandwiched between two layers of electrodes that have a crossbar structure. A first crossbar in the crossbar structure is located on a first side of the chip identification layer and includes a first set of electrical contacts in a first grid pattern contacting the first side of the chip identification layer. A second crossbar in the crossbar structure is located on a second side of the chip identification layer and includes a second set of electrical contacts in a second grid pattern contacting the second side of the chip identification layer.