Chip Shielding Coating That Eliminates Extra Grounding Layers
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Solution Overview
Problem
Existing manufacturing processes for electronic chips with electromagnetic shielding are complex and increase the size of the final chip due to the inclusion of multiple layers and interconnecting elements, making them difficult to produce.
Innovation Solution
A manufacturing process involving the formation of a conductive coating on the side and bottom faces of the substrate, connected to conductive tracks on the interconnect structure, which allows for direct grounding without additional layers or vias, using a conductive coating applied by spraying or inkjet printing, and incorporating silver nanoparticles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple layers and interconnecting elements are used for electromagnetic shielding, then shielding effectiveness is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent merges the electromagnetic shielding function with the substrate structure by forming a conductive coating directly on the substrate's side and bottom faces. This integration eliminates the need for separate shielding layers and interconnecting elements, achieving effective EMI shielding while reducing structural complexity and manufacturing steps.
2Reliability
If multiple layers and interconnecting elements are used for electromagnetic shielding, then shielding effectiveness is improved, but manufacturing time and process difficulty increase
Solution Approach 1:
The conductive coating is formed on the substrate's side and bottom faces during the substrate preparation stage, before the chip assembly process. This preliminary action integrates the shielding structure creation into an existing manufacturing step, eliminating the need for separate shielding layer deposition and via formation operations, thereby significantly improving manufacturing efficiency.
3Reliability
If additional layers and vias are added for grounding the electromagnetic shield, then shielding effectiveness is improved, but the size of the final chip increases
Solution Approach 1:
The patent extracts the grounding function from the traditional multi-layer via structure and implements it directly through the conductive coating on the substrate's bottom face. This approach eliminates the need for additional grounding layers and vias that would increase chip volume, achieving effective grounding while maintaining a compact chip size.
4Ease of manufacture
If conductive coating is applied by spraying or inkjet printing with silver nanoparticles, then manufacturing simplicity is improved, but material precision and coating uniformity may be affected
Solution Approach 1:
The patent employs advanced spraying or inkjet printing technology with controlled parameters (droplet size, deposition speed, coating thickness, drying conditions) to achieve uniform and precise conductive coating. By optimizing these parameters, the process maintains both manufacturing simplicity and high coating precision, ensuring consistent electrical conductivity and shielding effectiveness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process simplifies the manufacturing by eliminating the need for additional layers and vias, saving space and maintaining accessibility of connection pads for assembly, while providing effective electromagnetic shielding.
Implementation Method 1
To protect them from unwanted electromagnetic radiation, it is common practice to create a mold around the chip at the component level and form an electromagnetic shield around the mold
Implementation Method 2
the conductive coating is connected to the conductive tracks at at least one side of the interconnecting structure
Data Source
Figure 1A~1E
Figure 1F~1I
Figure 1J~3
AI summary
This description relates to a method comprising the following steps: i) providing a chip (100) comprising: - an insulating substrate (12), covered by an interconnection structure (22), comprising an insulating layer (24) in which conductive tracks (26) are formed, the conductive tracks (26) emerging at the level of a top face of the interconnection structure (22) and on one of the sides of the interconnection structure (22), - connection pads (30) being partially coated by a resin (40), so as to be connected to the conductive tracks (26) and to be able to be connected to an external element, ii) forming a conductive coating (50) to cover the substrate (12) and the sides of the interconnection structure (22), by which means the conductive coating (50) is connected to the conductive tracks (26).