Semiconductor Chip Sidewall Texture for Fine-Pitch Reflow Bonding

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Solution Overview

Problem

In semiconductor chip mounting by flux reflow, fine chips tend to experience faulty coupling due to inadequate contact between solder on the chip side and under bump metal on the substrate side, leading to reduced manufacturing yield.

Innovation Solution

The formation of a projection-and-depression structure through dry etching on the side surface of the semiconductor substrate increases surface tension, facilitating contact between bumps and electrodes during mounting, thereby enhancing the bonding process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If flux reflow mounting is used for fine chips, then mounting process is simple, but faulty coupling occurs and manufacturing yield decreases

Engineering Contradiction:
Improvemounting process simplicityVSAvoidmanufacturing yield
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The invention applies local quality by creating projection-and-depression structures at specific locations on the chip side surfaces. These localized structural modifications increase surface area and improve flux retention at critical mounting regions without altering the entire chip structure, thereby enhancing coupling reliability while maintaining process simplicity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The projection-and-depression structures are formed in advance on the chip before mounting. This preliminary action ensures that when flux reflow mounting is performed, the pre-formed structures immediately provide enhanced surface tension and flux retention, preventing faulty coupling from the outset and improving manufacturing yield.

Inventive Principle:
Principle #10Preliminary action

2Volume of moving object

If chip size is reduced to 50-500 μm, then device integration increases, but contact between solder and UBM becomes inadequate

Engineering Contradiction:
Improvechip sizeVSAvoidsolder-UBM contact quality
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The invention transitions from a two-dimensional flat surface to a three-dimensional projection-and-depression structure on the chip side surfaces. This dimensional change increases the effective surface area and creates multiple contact points, ensuring adequate solder-UBM contact even when the chip size is reduced to 50-500 μm.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The projection-and-depression structures create a porous-like surface morphology that increases surface area and enhances flux penetration. This allows better wetting and contact between the solder and UBM layers, compensating for the reduced chip size and maintaining manufacturing precision.

Inventive Principle:
Principle #31Porous materials

3Strength

If projection-and-depression structure is added to chip, then bond strength improves, but device complexity increases

Engineering Contradiction:
Improvebond strengthVSAvoidchip structure complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The side surfaces of the chip are segmented into multiple projection and depression regions rather than being a single continuous surface. This segmentation increases surface area and bond strength while keeping each individual projection structure relatively simple, thereby limiting the overall increase in device complexity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves manufacturing yield by ensuring proper contact and fusion coupling between chip and substrate, reducing faulty coupling and associated costs.

Implementation Method 1

the projection-and-depression structure is formed by dry etching in the side surface of the semiconductor substrate. This increases a surface tension on the side surface of the semiconductor substrate.

Methodology Applied
Scientific EffectSurface tension: Surface Tension

Data Source

PatentUS12068434B2Semiconductor device and semiconductor unit
Publication Date: 2024.08.20 SONY SEMICON SOLUTIONS CORP
  • US12068434B2 patent drawing
  • US12068434B2 patent drawing
  • US12068434B2 patent drawing

AI summary

A first semiconductor device of an embodiment of the present disclosure includes: a semiconductor substrate having one surface and another surface opposed to each other, and having a side length of 50 μm or more and 500 μm or less; a single or multiple bumps provided on the other surface; and a projection-and-depression structure formed in a side surface of the semiconductor substrate.