Semiconductor Chip Sinter Joining With Segmented Metal Paste Gaps
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Solution Overview
Problem
The existing semiconductor manufacturing processes face challenges with voids in joining layers, leading to volatile substances being released during heat treatment, which affects the joining quality and exposure to reducing atmospheres, particularly when using metal pastes for joining semiconductor devices and heat dissipating boards.
Innovation Solution
The process involves forming metal paste patterns with gaps between them on a target object and semiconductor chips, allowing for sintering and degassing, while using a stencil or imprint mask to create the patterns, which helps in uniform sintering and preventing positional displacement due to thermal expansion differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If metal paste is applied continuously without gaps for joining semiconductor chips, then joining strength is improved, but volatile substances cannot be released during heat treatment causing voids and defects
Solution Approach 1:
The metal paste pattern is divided into multiple segments with gaps between adjacent patterns. These gaps serve as escape routes for volatile substances generated during heat treatment, preventing void formation while maintaining sufficient joining strength through the segmented paste structure.
Solution Approach 2:
Different regions of the metal paste pattern have different properties - the paste regions provide joining strength and adhesion, while the gap regions provide volatile substance release pathways. This local differentiation allows simultaneous achievement of strong joining and effective degassing.
2Area of stationary object
If metal paste is applied in large areas for mounting larger chips, then chip size capability is improved, but positional displacement due to thermal expansion becomes more significant
Solution Approach 1:
Large-area metal paste patterns are segmented into smaller discrete patterns with gaps. This segmentation reduces the cumulative thermal expansion effect across large areas while maintaining adequate total bonding area, thereby preventing positional displacement during thermal processing.
3Object-generated harmful factors
If gaps are introduced in metal paste patterns for degassing, then volatile substance release is improved, but joining layer quality deteriorates due to increased voids
Solution Approach 1:
The metal paste is applied in a partial coverage pattern rather than continuous coverage, with gaps strategically positioned for degassing. The paste areas provide sufficient joining function while the gaps enable volatile substance release, achieving optimal balance between bonding and degassing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the joining quality by enabling efficient degassing and reducing the risk of positional displacement between semiconductor chips and target objects, allowing for larger chip sizes to be mounted and improving the overall reliability of the semiconductor apparatus.
Implementation Method 1
a process of forming metal paste patterns 200 with gaps 150 provided between adjacent ones on a front surface of a target object 110, a process of arranging a semiconductor chip 130 on a supporting substrate 320, and a process of joining the semiconductor chip 130 and the target object 110 by sintering of the metal paste patterns 200
Implementation Method 2
since the percentage of voids is large in a circumference of a joining layer 104a opposing a semiconductor device 101 and in a joining layer 104b positioned in a peripheral part on the rear surface side of an insulated circuit board, at the time of heat treatment for joining the insulated circuit board and a heat dissipating board 105, a volatile substance from a metal paste for joining is easily released to the outside of the joining layers
Data Source
AI summary
A manufacturing method of a semiconductor apparatus in which a semiconductor chip is joined to a target object, the manufacturing method including forming, in a joining region between the semiconductor chip and the target object where the semiconductor chip and the target object should be joined to each other, a plurality of metal paste patterns with a gap being provided in at least a part along a thickness direction between one another, and joining the semiconductor chip and the target object by sintering the plurality of metal paste patterns sandwiched between the semiconductor chip and the target object in a state where the gap exists between one another.