Chip Size Package Integrating Imaging and Light Elements
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Solution Overview
Problem
Conventional methods for integrating solid-state imaging elements and light emitting elements, such as CMOS and LEDs, face challenges in downsizing the combined module and simplifying the complex processes involved in their integration, making it difficult to achieve a compact chip size package.
Innovation Solution
A chip size package is developed by integrating a solid-state imaging element and a light emitting element using a WCSP or COW manufacturing method, where the light emitting element is formed using sapphire glass as a support substrate, and the elements are bonded and singulated to create a compact module with a moth-eye processed portion and light shielding features to optimize light directivity and shielding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional wafer process is used to integrate solid-state imaging element and light emitting element, then both elements can be combined, but the entire integrated module cannot be downsized
Solution Approach 1:
The patent merges the solid-state imaging element and light emitting element into a single integrated module at the wafer level before dicing, allowing them to share common structures and reduce overall size. The imaging element and light emitting element are formed on the same substrate with shared layers, eliminating the need for separate modules and reducing the integrated module's volume.
Solution Approach 2:
The integration process is segmented into distinct stages: forming the substrate and intermediate layers first, then selectively forming the light emitting element and imaging element in different regions. This segmentation allows independent optimization of each element while maintaining compact integration, resolving the contradiction between downsizing and process complexity.
2Ease of manufacture
If conventional wafer process is used to integrate solid-state imaging element and light emitting element, then both elements can be combined, but the process becomes complicated
Solution Approach 1:
The substrate and intermediate layers are prepared in advance before the imaging element and light emitting element are formed. This preliminary action establishes a common foundation that simplifies subsequent processing steps, allowing both elements to be integrated using standardized wafer fabrication techniques rather than complex assembly processes.
Solution Approach 2:
The substrate and intermediate layers serve multiple functions: they provide mechanical support, electrical connections, and optical pathways for both the light emitting element and imaging element. This multi-functionality reduces the number of separate components and processes needed, simplifying the overall manufacturing process while maintaining integration.
3Area of stationary object
If signal processing circuit and I/O circuit are formed in second layer, then pixel signal can be processed, but circuits protrude laterally from pixel array region
Solution Approach 1:
The signal processing circuit and I/O circuit are arranged in the vertical dimension by stacking them in the second layer above the pixel array, rather than extending laterally in the same plane. This vertical arrangement reduces the lateral footprint of the module while maintaining full circuit functionality, resolving the contradiction between compact area and operational flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of a compact chip size package that effectively integrates solid-state imaging and light emitting elements, enhancing light directivity and shielding, thereby improving the module's performance and reducing its size and manufacturing complexity.
Implementation Method 1
a pixel array that performs photoelectric conversion
Implementation Method 2
a light emitting element that outputs irradiation light according to voltage applied
Implementation Method 3
a moth-eye processed portion for adjusting directivity of the irradiation light output from the light emitting element
Data Source
AI summary
The present disclosure relates to a chip size package that enables realization of a compact chip size package in which a solid-state imaging element and a light emitting element are integrated, a method of manufacturing the same, an electronic device, and an endoscope. The chip size package which is an aspect of the present disclosure is provided with a solid-state imaging element which generates a pixel signal according to incident light and a light emitting element which outputs irradiation light according to voltage applied in which the solid-state imaging element and the light emitting element are integrated. The present disclosure is applicable to, for example, a compact electronic device, a medical endoscope, and the like.