Chip Package Solder Ball Warpage Compensation

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Solution Overview

Problem

Chip packages with increased functions and smaller sizes face issues of warpage, leading to poor durability and performance due to solder balls failing to bond properly with packaging substrates, resulting in low yield and reliability.

Innovation Solution

The use of solder balls with different sizes and arrangements based on warpage measurements to compensate for chip warpage, ensuring proper bonding and contact with packaging substrates through a wafer-level or chip-level packaging process, where solder balls are strategically placed and resized during the reflow process to address warpage and enhance bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If chip packages are designed with more functions and smaller sizes, then integration density and functionality are improved, but chip warpage increases causing solder balls to fail bonding

Engineering Contradiction:
ImprovefunctionalityVSAvoidbonding reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies local quality by using solder balls of different sizes at different locations on the chip. Specifically, larger solder balls are placed in regions with higher warpage (such as corner regions) while smaller solder balls are placed in regions with lower warpage. This localized differentiation allows each solder ball to compensate for the specific warpage characteristics of its region, ensuring reliable bonding across the entire chip surface while maintaining high integration density.

Inventive Principle:
Principle #3Local quality

2Productivity

If chip packages are designed with more functions and smaller sizes, then integration density is improved, but chip warpage increases leading to poor durability

Engineering Contradiction:
Improveintegration densityVSAvoiddurability
Core Design Contradiction:
ProductivityVSStrength

Solution Approach 1:

The patent applies parameter changes by varying the size parameter of solder balls based on the warpage characteristics of different chip regions. The solder ball size is adjusted as a compensatory parameter to counteract warpage effects. This parameter differentiation enables the packaging structure to maintain durability despite the increased warpage caused by high integration density designs.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If uniform solder balls are used for bonding, then manufacturing process is simple, but warpage compensation is insufficient leading to low yield

Engineering Contradiction:
Improveprocess simplicityVSAvoidyield
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent implements local quality by transitioning from uniform solder balls to location-specific solder ball sizes. The manufacturing process places larger solder balls in high-warpage regions and smaller solder balls in low-warpage regions. This approach maintains reasonable process simplicity while dramatically improving yield by ensuring proper bonding in all regions, particularly in corner areas that would otherwise fail with uniform solder balls.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9881889B2Chip package and method for fabricating the same
Publication Date: 2018.01.30 XINTEC INC
  • US9881889B2 patent drawing
  • US9881889B2 patent drawing
  • US9881889B2 patent drawing

AI summary

A chip package is provided, in which includes: a packaging substrate, a chip and a plurality solder balls interposed between the packaging substrate and the chip for bonding the packaging substrate and the chip, wherein the solder balls include a first portion of a first size and a second portion of a second size that is different from the first size.