Semiconductor Chip Spacer Layout for Coplanar Package Mounting
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Solution Overview
Problem
In semiconductor devices, the face-down mounting+face-up mounting spacer structure faces challenges with thermal deformation causing the controller chip to bend, leading to increased adhesive film thickness and mounting height due to height differences between the controller chip and spacers, which affects compact packaging and electrical connections.
Innovation Solution
The height of each spacer from the substrate is set within a specific range between the upper and lower limits of the controller chip's height to minimize adhesive film thickness and mounting height, and the spacers are strategically arranged to equalize the height difference, ensuring efficient material use and reduced variation in thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the controller chip is mounted face-down and spacers are used for face-up mounting, then the mounting flexibility is improved, but thermal deformation causes the controller chip to bend and increases adhesive film thickness
Solution Approach 1:
The patent changes the height parameter of the spacers to match the thickness of the controller chip. By setting the spacer height equal to the chip thickness, the top surfaces become coplanar, eliminating the need for thick adhesive films and preventing thermal deformation issues.
Solution Approach 2:
The patent creates an equipotential surface by ensuring that the top surface of the controller chip and the top surfaces of the spacers are at the same height level. This coplanar arrangement eliminates height differences that would otherwise require additional adhesive material and cause thermal stress.
2Stability of the object's composition
If spacers are used to support memory chips, then the structural stability is improved, but height difference between controller chip and spacers increases mounting height
Solution Approach 1:
The patent adjusts the height parameter of the spacers to be equal to the thickness of the controller chip. This parameter matching ensures that when memory chips are mounted on the spacers, their top surfaces align with the controller chip top surface, minimizing the overall mounting height while maintaining structural stability.
3Adaptability or versatility
If spacer height varies, then adaptability to different chip thicknesses is improved, but variation in thickness leads to electrical connection failures
Solution Approach 1:
The patent establishes a specific parameter relationship where spacer height equals controller chip thickness. This precise parameter matching ensures coplanar surfaces for reliable electrical connections while maintaining adaptability to different chip dimensions by simply adjusting the spacer height to match each chip's thickness.
Data Source
AI summary
In a semiconductor device, a substrate has a main surface. A first semiconductor chip has a first front surface and a first back surface, and is mounted on the main surface via a plurality of bump electrodes. A first spacer has a second front surface and a second back surface that is mounted on the main surface. A height of the second front surface from the main surface is within a range between a highest height and a lowest height of the first back surface from the main surface. A second spacer has a third front surface and a third back surface that is mounted on the main surface. A height of the third front surface from the main surface is within the range between the highest height and the lowest height of the first back surface from the main surface.