Chip Stack Overhang Support Structure for Deflection Control

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Solution Overview

Problem

Chip stack packages face failures during fabrication due to deflections of overhanging semiconductor chips, which are prone to damage when forces are applied during processes like wire bonding, as they lack sufficient support.

Innovation Solution

Attaching a supporter to the bottom surface and sidewall of the overhang of the upper chip and the sidewall of the lower chip to provide additional support and suppress deflection, using materials with similar thermal expansion coefficients to minimize stress and enhance adhesive strength.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If an upper semiconductor chip is stacked over a lower semiconductor chip with an overhang, then the chip stack package can include chips of different sizes or optimized layouts, but the overhanging portion is prone to deflections and failures during fabrication

Engineering Contradiction:
Improvechip size compatibilityVSAvoidoverhang stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A support structure is introduced as an intermediary element between the upper and lower chips. This support structure extends from the lower chip to the underside of the overhanging portion of the upper chip, providing mechanical reinforcement and preventing deflection during wire bonding and fabrication processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution adds a vertical support element that extends downward from the overhanging chip into the space between chips. This creates a three-dimensional support architecture that addresses the two-dimensional planar limitation, allowing overhangs to be stabilized without changing the chip layouts.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If a support structure is added to prevent overhang deflection, then overhang stability improves, but device complexity increases

Engineering Contradiction:
Improveoverhang stabilityVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The support structure is implemented as a thin adhesive layer or support film that can be applied conformally to the chip surfaces. This thin-film approach provides the necessary mechanical support while minimizing the added volume and visual complexity of the package structure.

Inventive Principle:
Principle #30Flexible shells and thin films

Solution Approach 2:

The support structure is integrated with the existing adhesive layers used for chip stacking. By combining the support function with the bonding adhesive, the solution provides dual functionality without requiring separate discrete support components, thereby reducing overall complexity.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The additional support structure significantly reduces deflection and damage to overhanging chips, improving the bending resistance and reliability of chip stack packages by distributing forces effectively and maintaining adhesive strength across temperature variations.

Implementation Method 1

a first supporter attached to a bottom surface of the overhang of the second chip and the sidewall of the first chip

Methodology Applied
Scientific EffectAdhesive: Adhesive

Implementation Method 2

using materials with similar thermal expansion coefficients to minimize stress and enhance adhesive strength

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS9293443B2Chip stack packages, methods of fabricating the same, electronic systems including the same and memory cards including the same
Publication Date: 2016.03.22 SK HYNIX INC
  • US9293443B2 patent drawing
  • US9293443B2 patent drawing
  • US9293443B2 patent drawing

AI summary

A chip stack package includes a first chip disposed over a substrate, a second chip disposed over the first chip and having an overhang, and a first supporter attached to a bottom surface of the overhang of the second chip and a sidewall of the first chip. The overhang of the second chip protrudes from the sidewall of the first chip.