Chip Stack Substrate Trench Layout for Stress-Stable Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge of integrating multiple semiconductor chips in a single package while maintaining structural stability and minimizing defects, particularly in portable devices, has not been adequately addressed by existing technologies.
Innovation Solution
A semiconductor package design featuring a substrate with vias and a chip stack, where semiconductor chips are bonded using metal-to-metal hybrid bonding, and a trench on the substrate to reduce stress, combined with a buffer structure in the trench to enhance structural stability and reduce bending.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple semiconductor chips are stacked in a single package, then the integration density and performance are improved, but the structural stability deteriorates due to stress and bending
Solution Approach 1:
The substrate is segmented by forming a trench that divides it into first and second regions. This segmentation allows differential stress management, where the first region (with the chip stack) can accommodate stress from multiple stacked chips while the second region maintains structural integrity, thus resolving the contradiction between high integration density and structural stability.
Solution Approach 2:
Different regions of the substrate are given different structural properties through the trench formation. The first region under the chip stack is designed to handle localized stress from the stacked chips, while the second region maintains higher rigidity. This local differentiation enables the package to achieve both high integration density and overall structural stability.
2Volume of moving object
If multiple semiconductor chips are stacked in a single package, then the miniaturization is achieved, but the occurrence of defects increases due to stress concentration
Solution Approach 1:
The trench divides the substrate to segment stress pathways, preventing stress concentration that would lead to defects. This allows miniaturized multi-chip stacking while maintaining reliability by directing and distributing stress away from critical bonding interfaces.
Solution Approach 2:
The trench acts as an intermediary structure between the chip stack and the rest of the substrate. It mediates the stress transfer, reducing stress concentration at the chip-substrate interface and thereby decreasing defect occurrence in the miniaturized package structure.
3Stability of the object's composition
If the substrate rigidity is increased to maintain structural stability, then the bending is reduced, but the stress concentration increases causing chip damage
Solution Approach 1:
The substrate is segmented into regions with different effective rigidities. The first region under the chip stack has reduced rigidity due to the trench, which prevents stress concentration and chip damage. The second region maintains higher rigidity for overall structural stability, thus resolving the contradiction between these two requirements.
Solution Approach 2:
Different local regions of the substrate are designed with different mechanical properties. The first region has lower rigidity to accommodate stress from the chip stack without causing damage, while the second region has higher rigidity to maintain overall structural stability, eliminating the need to choose between the two extremes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design provides improved structural stability and reduces the occurrence of defects, preventing damage to the semiconductor chips and enhancing the reliability of the package.
Implementation Method 1
chip pads of the first semiconductor chip and substrate pads of the substrate are bonded to each other, and the chip pads and the substrate pads are integrally formed of the same metal material
Implementation Method 2
a buffer structure in the trench, wherein the trench extends across a first side surface and a second side surface of the lowermost semiconductor chip among the semiconductor chips... and a rigidity of the buffer structure is smaller than a rigidity of the semiconductor substrate
Data Source
AI summary
A semiconductor package may include a substrate including a plurality of vias and a chip stack on the substrate. The chip stack may include a plurality of semiconductor chips, wherein a first semiconductor chip is a lowermost one of the plurality of semiconductor chips in the chip stack, chip pads of the first semiconductor and substrate pads of the substrate are bonded to each other, and the chip pads and the substrate pads are integrally formed of the same metal material, the first semiconductor chip includes a corner region adjacent to a corner of the first semiconductor chip, and a center region excluding the corner region, the substrate includes a trench on an upper surface of the substrate, and the trench extends along a boundary between the corner region and the center region of the first semiconductor chip.