Chip-Stacked Redistribution Layer Structure for Reliable Bump Bonding

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Solution Overview

Problem

The challenge in semiconductor device manufacturing is to achieve thinner devices while maintaining strong bonding and reliability, especially with the transition from printed circuit boards to redistribution layers, where existing technologies face issues with adhesion and reliability of bumps due to material interactions and structural integrity.

Innovation Solution

The semiconductor device employs a redistribution layer with specific barrier layers and conductive members, including titanium and copper, and a method involving multiple insulating and conductive layers, where the electrode protrudes to anchor bumps, enhancing bonding strength and reliability by using intermetallic compound layers and gold diffusion for improved adhesion and resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If a redistribution layer is used instead of a printed circuit board to achieve thinner semiconductor devices, then the thickness is reduced, but the adhesion and reliability of bumps deteriorate due to material interactions and structural integrity issues

Engineering Contradiction:
Improvethickness of semiconductor deviceVSAvoidadhesion and reliability of bumps
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

A barrier layer is introduced as an intermediary between the copper conductive layer and the organic insulating layer. This barrier layer prevents harmful interactions between copper and organic materials while maintaining structural integrity and adhesion, thereby preserving bump reliability in thinner device configurations

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The redistribution layer employs a composite structure combining multiple materials: copper for high conductivity, organic insulating materials for isolation, and barrier layers for adhesion and protection. This composite approach optimizes both electrical performance and mechanical reliability in thin-profile devices

Inventive Principle:
Principle #40Composite materials

2Power

If copper is used as a conductive material in the redistribution layer, then electrical conductivity is improved, but adhesion to organic materials deteriorates

Engineering Contradiction:
Improveelectrical conductivityVSAvoidadhesion to organic materials
Core Design Contradiction:
PowerVSStrength

Solution Approach 1:

The barrier layer serves as a mediator between copper and organic insulating materials, enabling copper to provide high electrical conductivity while the barrier layer maintains adhesion to organic materials, thus resolving the adhesion-conductivity trade-off

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a thinner semiconductor device with increased bonding force and reliability, reducing the risk of cracks and peeling, and improves manufacturing stability by using titanium as a barrier layer for enhanced adhesion to organic materials.

Implementation Method 1

a first barrier layer, a conductive layer, and a second barrier layer on a support substrate. The method includes forming an electrode inside the second opening and inside a lower portion of the first opening

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

improves manufacturing stability by using titanium as a barrier layer for enhanced adhesion to organic materials

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 3

employing intermetallic compound layers and gold diffusion for improved adhesion and resistance

Methodology Applied
Scientific EffectIntermetallic compound formation: Chemical Bonding

Data Source

PatentUS11923287B2Method for manufacturing semiconductor device having chip stacked and molded
Publication Date: 2024.03.05 KIOXIA CORP
  • US11923287B2 patent drawing
  • US11923287B2 patent drawing
  • US11923287B2 patent drawing

AI summary

A semiconductor device includes an insulating layer, a conductive member provided inside the insulating layer, a chip disposed on a first surface of the insulating layer and connected to the conductive member, and an electrode connected to the conductive member via a barrier layer. A resistivity of the barrier layer is higher than a resistivity of the conductive member. At least a portion of the electrode protrudes from a second surface of the insulating layer.