Chip Electronic Component With Stacked Internal Coil Structure
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Solution Overview
Problem
Existing inductor technologies face challenges in achieving a high aspect ratio for internal coils without increasing the risk of short-circuits and efficiency limitations, particularly in miniaturized IT devices, where increasing coil thickness while maintaining a small width is crucial for reducing direct current resistance and enhancing inductance.
Innovation Solution
A chip electronic component with a structure featuring a first coil pattern formed on an insulating substrate, a second coil pattern formed isotropically to cover the first, and a third coil pattern formed anisotropically on top, using electroplating methods to control growth directions and prevent short-circuits, with a defined aspect ratio of 1.2 or more by adjusting plating thickness ratios.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thickness of the coil is increased to achieve a high aspect ratio, then the direct current resistance decreases and inductance improves, but the risk of short-circuits between coil portions increases
Solution Approach 1:
The coil structure is divided into multiple separate coil patterns (first, second, and third coil patterns) that are stacked in layers. Each coil pattern is electrically isolated from the others through the insulating substrate and spacing structures, preventing short-circuits while maintaining high inductance through the stacked configuration.
Solution Approach 2:
The coil structure transitions from a two-dimensional planar arrangement to a three-dimensional stacked configuration. By arranging coil patterns in multiple layers (first coil pattern on substrate, second coil pattern covering first, third coil pattern on second), the effective cross-sectional area increases without increasing the planar footprint, thus reducing DC resistance while maintaining electrical isolation.
2Reliability
If the width of the coil is increased to reduce direct current resistance, then the inductance improves, but the area occupied by magnetic material decreases and efficiency is limited
Solution Approach 1:
The solution moves from increasing coil width in the planar direction to increasing coil thickness in the vertical direction through stacked coil patterns. This dimensional transition allows the coil cross-sectional area to increase (reducing DC resistance) while keeping the magnetic material concentrated in the vertical stacking region, maximizing magnetic material utilization efficiency.
3Length of stationary object
If the thickness of the plating resist is increased to form a thicker coil, then the coil thickness increases, but the interval between coil portions must be increased to maintain form
Solution Approach 1:
The coil is segmented into multiple thin coil patterns stacked in layers rather than forming a single thick coil. This segmentation allows each individual coil pattern to maintain adequate spacing while the stacked configuration achieves the desired overall thickness, eliminating the need to increase intervals between coil portions.
Solution Approach 2:
Instead of increasing coil thickness through a single thick plating resist layer (which would require increased spacing), the thickness is achieved by stacking multiple thin coil patterns in the vertical dimension. This allows tighter spacing in the planar view while achieving greater effective thickness through layering.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents short-circuits and enhances the aspect ratio of internal coils, reducing direct current resistance and improving inductance, while maintaining a compact design suitable for miniaturized IT devices.
Implementation Method 1
A chip electronic component with a structure featuring a first coil pattern formed on an insulating substrate, a second coil pattern formed isotropically to cover the first, and a third coil pattern formed anisotropically on top, using electroplating methods to control growth directions
Data Source
AI summary
There are provided a chip electronic component and a manufacturing method thereof, and more particularly, a chip electronic component having an internal coil structure capable of preventing the occurrence of short-circuits between coil portions and having a high aspect ratio (AR) by increasing a thickness of a coil as compared to a width of the coil, and a manufacturing method thereof.


