Chip Start-Up Timing Circuit for Abnormal Boot Detection
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Solution Overview
Problem
Existing chips, particularly in intelligent driving applications, often fail to monitor abnormal start-up processes, leading to potential operational failures that can compromise driving safety.
Innovation Solution
A chip structure incorporating a power management circuit, processor, and monitoring circuit that synergistically monitor abnormal start-up by determining the numerical relation between current and preset start-up durations, allowing internal self-diagnosis without external dependencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a chip start-up monitoring mechanism is implemented, then the reliability of chip operation is improved, but the device complexity increases due to additional monitoring circuits and timing mechanisms
Solution Approach 1:
The monitoring circuit is integrated within the chip itself, merging the monitoring function with the existing power management circuit and processor. The power management circuit triggers the monitoring circuit, and the processor can stop the timing operation, creating a unified self-monitoring system that improves reliability without requiring entirely separate external monitoring equipment.
Solution Approach 2:
The chip performs self-diagnosis through internal monitoring circuits that track the start-up process. The power management circuit initiates the timing operation, and the processor can terminate it when ready, allowing the chip to autonomously monitor its own start-up status and detect abnormalities without external intervention.
2Ease of operation
If internal self-diagnosis is implemented without external dependencies, then the ease of operation is improved, but the device complexity increases due to integrated monitoring functions
Solution Approach 1:
The chip autonomously monitors its own start-up process through integrated circuits. The power management circuit automatically triggers the monitoring function, and the processor can independently stop the timing operation when ready, enabling self-diagnosis without requiring external monitoring equipment or manual intervention.
Solution Approach 2:
The monitoring circuit serves multiple functions: it tracks the start-up timing, detects processor readiness, and determines whether start-up is normal or abnormal. This multi-functional approach simplifies operation by providing comprehensive monitoring through a single integrated system rather than requiring separate specialized circuits for each function.
Data Source
AI summary
Disclosed are a chip, a method for monitoring abnormal start-up of a chip, a storage medium, and an electronic device. The chip includes: a power management circuit, a processor, and a monitoring circuit, where the power management circuit is configured for, in response to the power management circuit entering an operating state, triggering the monitoring circuit to perform a timing operation; the processor is configured for, in response to the processor entering the operating state, triggering the monitoring circuit to stop performing the timing operation; and the monitoring circuit is configured for determining a numerical relation between a current timing duration of the timing operation and a preset start-up duration, and determining, based on the numerical relation, a startup abnormality monitoring result of the chip. With embodiments of this disclosure, it is enabled to effectively monitor abnormal start-up of the chip.