Chip Tacking via Function Layer Openings for Alignment Accuracy

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Solution Overview

Problem

Existing methods for attaching chips to substrates face challenges in achieving high throughput and alignment accuracy, particularly at short distances, and require underfill materials that balance adhesion and support while minimizing material effects on alignment.

Innovation Solution

A method involving a function layer with free space for contact elements, where the function layer is treated with a solvent or adhesion layer to facilitate chip attachment without penetrating the layer, allowing for improved electrical contact and alignment accuracy, and using materials with B-stage properties for post-placement crosslinking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If underfill material is applied by capillary action after chip placement, then alignment accuracy is maintained, but throughput is reduced and material choice is limited

Engineering Contradiction:
Improvealignment accuracyVSAvoidthroughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The underfill material is applied to the substrate surface before chip placement, allowing chips to be positioned directly onto the pre-applied material. This eliminates the need for post-placement capillary action, significantly increasing throughput while maintaining alignment accuracy through pre-positioning features.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of applying underfill material after chip placement (conventional method), the patent inverts the sequence by applying the material first, then placing chips onto it. This reversal enables high-speed placement without compromising alignment or material selection.

Inventive Principle:
Principle #13The other way round (Inversion)

2Productivity

If underfill material is applied before chip placement, then throughput is improved, but alignment accuracy deteriorates due to material movement

Engineering Contradiction:
ImprovethroughputVSAvoidalignment accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The underfill material is applied as a thin film or layer on the substrate surface. This thin-film configuration provides sufficient adhesion to prevent material movement during chip placement, maintaining alignment accuracy while enabling high throughput through pre-application.

Inventive Principle:
Principle #30Flexible shells and thin films

Solution Approach 2:

The patent controls the viscosity and curing characteristics of the underfill material to optimize its behavior during the process. By adjusting material parameters, the underfill remains stable enough to prevent movement during placement yet fluid enough to be applied easily before chips are positioned.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If function layer is penetrated by contact elements, then electrical contact is achieved, but manufacturing complexity increases and alignment tolerance is reduced

Engineering Contradiction:
Improveelectrical contactVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the electrical contact function from the underfill material by creating openings or windows in the function layer. Contact elements pass through these openings to establish electrical connection, eliminating the need for the underfill material to conduct electricity and simplifying the overall manufacturing process.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The function layer is segmented into regions: areas with openings for electrical contact and areas without openings for mechanical support. This segmentation allows the same underfill material to serve dual purposes - providing structural support where intact and enabling electrical connection where opened.

Inventive Principle:
Principle #1Segmentation

4Strength

If underfill material provides adhesion for tacking, then chip fixation is achieved, but material choice is limited and processing time increases

Engineering Contradiction:
ImproveadhesionVSAvoidprocessing speed
Core Design Contradiction:
StrengthVSProductivity

Solution Approach 1:

The patent utilizes temperature-dependent viscosity changes of the underfill material. At processing temperature, the material exhibits low viscosity for easy application and chip placement, then transitions to high viscosity or cures to provide strong adhesion for tacking, enabling fast processing without compromising bond strength.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances throughput, alignment accuracy, and contact density, eliminating the need for capillary action and allowing for precise chip placement even at short distances, with the solvent or adhesion layer ensuring secure attachment without residue.

Implementation Method 1

the function layer is treated with a solvent or adhesion layer to facilitate chip attachment

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

using materials with B-stage properties for post-placement crosslinking

Methodology Applied
Scientific EffectCrosslinking: Photopolymerisation

Data Source

PatentUS9245869B2Method for fastening chips with a contact element onto a substrate provided with a functional layer having openings for the chip contact elements
Publication Date: 2016.01.26 EV GRP E THALLNER GMBH
  • US9245869B2 patent drawing
  • US9245869B2 patent drawing
  • US9245869B2 patent drawing

AI summary

A method for tacking of chips onto a substrate at chip positions which are distributed on a surface of the substrate. The method includes the following steps: formation or application of a function layer onto the substrate, removing the function layer from the substrate at the chip positions at least in the region of contacts to uncover the contacts, tacking chips onto one chip contact side of the function layer at the chip positions and contacting the chips with the contacts via contact elements.