Chip Test Component DC Resistance Mounting Inspection
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Solution Overview
Problem
Multilayer electronic components face thermal shock-induced contraction stress during mounting on substrates, leading to potential cracks and disconnections due to differences in thermal expansion coefficients, which existing testing methods struggle to detect accurately.
Innovation Solution
A chip-type electronic component with all terminal electrodes short-circuited, allowing for DC resistance measurement between connection locations to determine disconnection states, including cracks or defective soldering, by measuring DC resistance between terminal electrodes and the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional testing methods (visual test or cross-section test) are used to detect disconnection states, then the test can be performed, but the testing capability is limited and cannot detect cracks inside the multilayer electronic component or in non-cut portions
Solution Approach 1:
The patent changes the electrical parameter configuration by short-circuiting all terminal electrodes internally, transforming the component into a test fixture that measures DC resistance at connection locations. This parameter change enables comprehensive detection of disconnection states including internal cracks that were previously undetectable by conventional visual or cross-section methods
Solution Approach 2:
The patent replaces mechanical testing methods (visual inspection and cross-section cutting) with electrical measurement (DC resistance measurement). This substitution allows non-destructive, comprehensive testing of all connection locations including internal structures without physical sectioning
2Measurement precision
If electric characteristics (capacitance, dielectric loss tangent, insulation resistance) are measured to test disconnection state, then the test can be performed, but the test is insufficient when crack parts are in partially electrically connected state
Solution Approach 1:
The patent changes the measurement parameter from AC-based electric characteristics (capacitance, dielectric loss, insulation resistance) to DC resistance measurement. This parameter change enables detection of partial disconnection states where cracks create high-resistance paths that do not completely interrupt AC signals but are clearly detectable through DC resistance measurements
3Ease of manufacture
If the multilayer electronic component is subjected to thermal shock during mounting, then the component can be mounted on substrate, but contraction stress concentrates around terminal electrode edges causing cracks in element body or connection locations
Solution Approach 1:
The patent performs preliminary action by internally short-circuiting all terminal electrodes before mounting. This preliminary configuration enables subsequent DC resistance measurements to detect whether thermal shock during mounting caused cracks, allowing quality assessment without requiring separate destructive testing
Solution Approach 2:
The patent establishes a feedback mechanism where DC resistance measurements provide information about the effectiveness of thermal shock resistance. By measuring resistance at connection locations after mounting, the system feedbacks whether cracks occurred during the thermal shock of mounting, enabling quality control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables effective and straightforward testing of the mounted state by reflecting disconnection states through measurable DC resistance values, allowing for the identification of crack or soldering defects and their positions.
Implementation Method 1
measuring a DC resistance between two connection locations out of connection locations between each of the terminal electrodes of the chip type electronic component for test mounted on the substrate, and the substrate
Implementation Method 2
With the thermal shock, therefore, the terminal electrodes are more likely to contract than the element body in the multilayer electronic component
Implementation Method 3
differences among coefficients of thermal expansion of the element body, terminal electrodes, solder, and substrate
Data Source
AI summary
A chip type electronic component for test is provided with an element body, and four or more terminal electrodes placed on the exterior of the element body. The element body has a plurality of laminated insulator layers, and a plurality of internal electrodes arranged to be opposed to each other with the insulator layer in between. Each of the internal electrodes is connected to at least one same terminal electrode out of the four or more terminal electrodes and connected to any one terminal electrode except for the at least one same terminal electrode.