Chip Test Pad Structure with Extended Probes for Alignment

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Solution Overview

Problem

The existing test pad structure on chips often results in difficulties for probes to contact the test pads due to misalignment, varying opening sizes, and wear, leading to compromised testing quality and increased costs.

Innovation Solution

A test pad structure comprising internal and extended test pads, where the extended pads increase the contact area and alignment range for probes, allowing for stable signal transmission and power delivery without requiring probe replacement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the opening size is reduced to match probe size, then alignment precision is improved, but the probe cannot enter the opening due to size mismatch

Engineering Contradiction:
Improvealignment precisionVSAvoidprobe entry
Core Design Contradiction:
Manufacturing precisionVSEase of operation

Solution Approach 1:

The test pad structure is segmented into two functional parts: the opening (for alignment) and the test pad (for contact). The test pad extends beyond the opening boundaries, allowing the probe to first align with the opening and then contact the extended test pad surface, resolving the conflict between precise alignment and sufficient contact area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The test pad extends in the horizontal plane beyond the vertical walls of the opening, utilizing the lateral dimension to provide additional contact area. This dimensional extension allows probes to contact the test pad at multiple lateral positions while maintaining vertical alignment through the opening.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Duration of action of moving object

If the opening cross-sectional area is increased to accommodate probe wear, then probe lifetime is extended, but alignment precision deteriorates

Engineering Contradiction:
Improveprobe lifetimeVSAvoidalignment precision
Core Design Contradiction:
Duration of action of moving objectVSManufacturing precision

Solution Approach 1:

The structure separates the alignment function (performed by the fixed-size opening) from the contact function (performed by the extended test pad). The opening maintains precise dimensions for alignment, while the test pad extends beyond the opening to provide a larger contact target that accommodates probe wear and positioning variations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different parts of the structure have different functional qualities: the opening region provides precise geometric constraints for alignment, while the extended test pad region provides a larger, more tolerant contact surface. This local differentiation of quality allows simultaneous achievement of precision and tolerance.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If the test pad contact area is increased to accommodate misalignment, then alignment tolerance is improved, but the structure complexity increases

Engineering Contradiction:
Improvealignment toleranceVSAvoidstructure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The structure is divided into the opening component and the test pad component, where the test pad independently extends beyond the opening. This segmentation allows the test pad to be optimized for contact area without affecting the opening's alignment function, achieving complexity reduction through functional separation.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11694983B2Test pad structure of chip
Publication Date: 2023.07.04 SITRONIX TECH CORP
  • US11694983B2 patent drawing
  • US11694983B2 patent drawing
  • US11694983B2 patent drawing

AI summary

The present invention provides a test pad structure of chip, which comprises a plurality of first internal test pads, a plurality of second internal test pads, a plurality of first extended test pads, and a plurality of second extended test pads. The first internal test pads and the second internal test pads are disposed in a chip. The second internal test pads and the first internal test pads are spaced by a distance. The first extended test pads are connected with the first internal test pads. The second extended test pads are connected with the second internal test pads. The first extended test pads and the second extended test pads may increase the contact area to be contacted by probes. Signals or power are transmitted to the first internal test pads and the second internal test pads via the first extended test pads and the second extended test pads for the probes to test the chip.