Wafer-Level Chip Test Voltage Control via Segmented Signals
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Solution Overview
Problem
In wafer-level aging tests for semiconductor devices, the inability to independently adjust the test voltage of each chip results in reduced test accuracy and effectiveness due to manufacturing process deviations, as conventional methods use a single test signal for all chips on a wafer, limiting individual voltage control.
Innovation Solution
A chip test method and apparatus that applies a test signal and a data signal to control each chip's test mode, allowing for independent regulation of test voltage by using a combination of test and data signals to enable precise voltage adjustment for each chip, utilizing a receiving module and voltage regulation circuit to achieve accurate voltage control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single test signal is used for all chips on a wafer, then the test process is simple and efficient, but the test voltage cannot be independently adjusted for each chip, reducing test accuracy
Solution Approach 1:
The patent segments the test signal into two independent components: a common test signal applied to all chips and individual data signals applied to each chip. This segmentation allows the test system to maintain high productivity through parallel processing while achieving precise individual voltage control for each chip through its dedicated data signal channel.
Solution Approach 2:
The data signal serves multiple functions: it acts as a control signal for voltage regulation and simultaneously carries chip identification information. This multi-functionality enables the system to achieve individualized voltage control without adding separate control lines, maintaining test efficiency while improving measurement precision.
2Measurement precision
If individual voltage control for each chip is implemented, then test accuracy is improved, but the test system complexity increases
Solution Approach 1:
The patent merges the voltage control function with the existing data signal transmission channel. By encoding voltage control information within the data signal that already carries chip identification data, the system achieves individualized voltage control without adding separate control circuits or increasing physical connection complexity.
Solution Approach 2:
The data signal acts as an intermediary that carries both chip identification information and voltage control instructions. This intermediary approach allows the test system to control individual chip voltages through an existing communication channel rather than requiring direct physical control connections to each chip.
3Ease of manufacture
If conventional wafer-level burn-in testing is used, then cost is reduced, but the inability to adjust individual chip conditions decreases test effect
Solution Approach 1:
The patent introduces dynamic adaptability to the wafer-level burn-in process by enabling real-time adjustment of test voltages for individual chips based on their specific characteristics. This dynamic control allows the system to optimize test conditions for each chip while maintaining the cost-effectiveness of wafer-level processing, thereby improving test reliability without sacrificing manufacturing efficiency.
Data Source
AI summary
The present application relates to a chip test method and apparatus, a computer device, and a readable storage medium thereof. The chip test method includes: applying a test signal to a to-be-tested chip; and sending a data signal to the to-be-tested chip such that the to-be-tested chip enters a test mode based on the test signal and the data signal, and regulating a test voltage of the to-be-tested chip.