Semiconductor Chip Testing Fraction Defective Threshold
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Solution Overview
Problem
Conventional semiconductor chip testing devices fail to detect tiny defects in semiconductor wafers, leading to the shipment of defective chips, as they incorrectly determine chips with such defects as non-defective.
Innovation Solution
A semiconductor chip testing method and device that calculates the percentage of defective chips at each wafer address and reclassifies chips at addresses with a fraction defective above a threshold from non-defective to defective, ensuring only high-reliability chips are deemed non-defective, incorporating a determining part, fraction defective calculating part, and determination updating part.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional electrical characteristic testing is used to determine chip defectiveness, then testing speed and simplicity are maintained, but tiny defects cannot be detected leading to defective chips being shipped
Solution Approach 1:
The invention segments the defect detection process into two stages: (1) initial electrical characteristic testing at individual chip level, and (2) statistical analysis at wafer address level. By dividing the detection approach, the system maintains simple individual chip testing while adding sophisticated statistical evaluation to detect tiny defects that individual tests miss.
Solution Approach 2:
The invention implements feedback by using determination results from multiple chips at the same wafer address to update and refine defectiveness determination. The fraction defective calculation feeds back into the testing process, allowing the system to identify and flag chips at addresses with high defect rates, even when individual chip tests show normal electrical characteristics.
2Reliability
If statistical analysis of multiple wafers is performed to detect tiny defects, then defect detection accuracy improves, but calculation and processing time increase
Solution Approach 1:
The system performs preliminary electrical characteristic testing on all chips before conducting statistical analysis. This preliminary action allows the fraction defective calculation to focus only on chips with normal individual test results, reducing the scope of statistical processing while maintaining high defect detection accuracy for tiny defects.
Solution Approach 2:
The invention applies statistical analysis locally at each wafer address rather than globally across all chips. By calculating fraction defective for each specific wafer address independently, the system efficiently identifies localized defect patterns without requiring exhaustive processing of all possible chip combinations, thus reducing overall processing time.
3Reliability
If chips at high fraction defective addresses are reclassified as defective, then shipment of defective chips is prevented, but more chips are rejected reducing yield
Solution Approach 1:
The invention changes the determination parameter from binary (defective/non-defective based on single chip test) to probabilistic (fraction defective at wafer address). By using statistical probability as the classification parameter, the system can set thresholds that balance quality assurance with yield preservation, reclassifying only those chips at addresses with statistically significant defect rates.
Solution Approach 2:
The invention replaces mechanical/physical inspection methods with statistical analysis and data processing. Instead of relying solely on physical electrical testing of each chip, the system uses mathematical probability models to identify defect patterns, enabling more accurate differentiation between truly defective chips and those with normal variations, thus maintaining yield while ensuring quality.
Data Source
AI summary
A semiconductor chip testing method includes: (a) testing the electrical characteristics of each of semiconductor chips in the form of wafers or in the form of chips formed on a predetermined number of semiconductor wafers having certain relationship, and determining if the semiconductor chip is non-defective or defective; (b) calculating a percentage of semiconductor chips determined to be defective as a fraction defective for each of wafer addresses based on determination results about the semiconductor chips on the predetermined number of semiconductor wafers, the wafer addresses indicating the respective positions of the semiconductor chips on the semiconductor wafers; and (c) changing a determination result about a semiconductor chip determined to be non-defective to defective, the semiconductor chip being at a wafer address determined to have a fraction defective at a threshold or higher than the threshold.


